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  • Patent number: 11016810
    Abstract: A system and method for a computing tile of a multi-tiled integrated circuit includes a plurality of distinct tile computing circuits, wherein each of the plurality of distinct tile computing circuits is configured to receive fixed-length instructions; a token-informed task scheduler that: tracks one or more of a plurality of distinct tokens emitted by one or more of the plurality of distinct tile computing circuits; and selects a distinct computation task of a plurality of distinct computation tasks based on the tracking; and a work queue buffer that: contains a plurality of distinct fixed-length instructions, wherein each one of the fixed-length instructions is associated with one of the plurality of distinct computation tasks; and transmits one of the plurality of distinct fixed-length instructions to one or more of the plurality of distinct tile computing circuits based on the selection of the distinct computation task by the token-informed task scheduler.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: May 25, 2021
    Assignee: Mythic, Inc.
    Inventors: Malav Parikh, Sergio Schuler, Vimal Reddy, Zainab Zaidi, Paul Toth, Adam Caughron, Bryant Sorensen, Alex Dang-Tran, Scott Johnson, Raul Garibay, Andrew Morten, David Fick