Abstract: A three-level encoding transmitter is disclosed in which a transmitter circuit is configured to receive an input data signal including binary data and transmit an encoded data signal. The transmitter circuit can include an inverter circuit configured transmit first and second voltages for each logical level of the binary data. A transmission control circuit can cause the inverter circuit to transmit the voltages or deactivate the inverter circuit based on a first control signal. The transmitter circuit can further include an idle circuit configured to transmit an idle voltage between the first and second voltages when there is no data transmission. The idle circuit may transmit the idle voltage based on a second control signal. The first and second control signals may be configured to only be active when the other is inactive.