Abstract: A method for performing leakage analysis includes receiving information specifying an integrated circuit. A neighborhood of shapes associated with the integrated circuit is then determined Leakage information associated with the integrated circuit is generated based on the neighborhood of shapes. The neighborhood of shapes may be determined by determining a first set of spacings to a boundary of a first cell from an internal shape. A second set of spacings may be determined from the boundary of the first cell to a shape of a second cell. A lithography process may be characterized using the first and second set of spacings.
Type:
Application
Filed:
October 29, 2013
Publication date:
June 26, 2014
Inventors:
Emre Tuncer, Hui Zheng, Vivek Raghavan, Anirudh Devgan, Amir Ajami, Alessandra Nardi, Tao Lin, Pramod Thazhathethil, Alfred Wong
Abstract: A method for performing timing analysis includes receiving information specifying an integrated circuit. A neighborhood of shapes associated with the integrated circuit is then determined. Delay information associated with the integrated circuit is generated based on the neighborhood of shapes. The neighborhood of shapes may be determined by determining a first set of spacings to a boundary of a first cell from an internal shape. A second set of spacings may be determined from the boundary of the first cell to a shape of a second cell. A lithography process may be characterized using the first and second set of spacings.
Type:
Grant
Filed:
July 20, 2007
Date of Patent:
June 25, 2013
Assignee:
Synopsys, Inc.
Inventors:
Emre Tuncer, Hui Zheng, Vivek Raghavan, Anirudh Devgan, Amir Ajami, Alessandra Nardi, Tao Lin, Pramod Thazhathethil, Alfred Wong
Abstract: A method for performing leakage analysis includes receiving information specifying an integrated circuit. A neighborhood of shapes associated with the integrated circuit is then determined. Leakage information associated with the integrated circuit is generated based on the neighborhood of shapes. The neighborhood of shapes may be determined by determining a first set of spacings to a boundary of a first cell from an internal shape. A second set of spacings may be determined from the boundary of the first cell to a shape of a second cell. A lithography process may be characterized using the first and second set of spacings.
Type:
Grant
Filed:
July 20, 2007
Date of Patent:
October 29, 2013
Assignee:
Synopsys, Inc.
Inventors:
Emre Tuncer, Hui Zheng, Vivek Raghavan, Anirudh Devgan, Amir Ajami, Alessandra Nardi, Tao Lin, Pramod Thazhathethil, Alfred Wong