Abstract: A method for selectively aligning and positioning semiconductor nanowires on a substrate by providing a substrate; patterning electrodes on a surface of the substrate; conditioning the surface of the substrate to attach semiconductor nanowires to the surface by functionalizing the surface with a first functional group having an affinity for the semiconductor nanowires; providing an environment in contact with the electrodes, the environment having suspended therein the semiconductor nanowires; and providing an electric field between the electrodes, thereby causing the nanowires in the environment to align between and electrically connect the electrodes to thereby form a semiconducting channel between the electrodes.
Type:
Grant
Filed:
October 4, 2006
Date of Patent:
April 10, 2012
Assignee:
President and Fellows of Harvard College
Inventors:
Charles M. Lieber, Yi Cui, Xiangfeng Duan, Yu Huang
Abstract: A system and method for manipulating and processing nanowires in solution with arrays of holographic optical traps. The system and method of the present invention is capable of creating hundreds of individually controlled optical traps with the ability to manipulate objects in three dimensions. Individual nanowires with cross-sections as small as 20 nm and lengths exceeding 20 ?m are capable of being isolated, translated, rotated and deposited onto a substrate with holographic optical trap arrays under conditions where single traps have no discernible influence. Spatially localized photothermal and photochemical processes induced by the well-focused traps can also be used to melt localized domains on individual nanowires and to fuse nanowire junctions.
Type:
Grant
Filed:
January 11, 2006
Date of Patent:
August 10, 2010
Assignees:
New York University, Harvard University
Inventors:
David G. Grier, Ritesh Agarwal, Guihua Yu, Charles M. Lieber, Kosta Ladavac, Yael Roichman
Abstract: A bulk-doped semiconductor that is at least one of the following: a single crystal, an elongated and bulk-doped semiconductor that, at any point along its longitudinal is, axis, has a largest cross-sectional dimension less than 500 nanometers, and a free-standing and bulk-doped semiconductor with at least one portion having a smallest width of less than 500 nanometers. At least one portion of such a semiconductor may a smallest width of less than 200 nanometers, or less than 150 nanometers, or less than 100 nanometers, or less than 80 nanometers, or less than 70 nanometers, or less than 60 nanometers, or less than 40 nanometers, or less than 20 nanometers, or less than 10 nanometers, or even less an 5 nanometers. Such a semiconductor may be doped during growth. Such a semiconductor may be part of a device, which may include any of a variety of devices and combinations thereof, and a variety assembling techniques may be used to fabricate devices from such a semiconductor.
Type:
Grant
Filed:
October 4, 2006
Date of Patent:
February 23, 2010
Assignee:
President and Fellows of Harvard College
Inventors:
Charles M. Lieber, Yi Cui, Xiangfeng Duan, Yu Huang
Abstract: A bulk-doped semiconductor that is at least one of the following: a single crystal, an elongated and bulk-doped semiconductor that, at any point along its longitudinal axis, has a largest cross-sectional dimension less than 500 nanometers, and a free-standing and bulk-doped semiconductor with at least one portion having a smallest width of less than 500 nanometers. Such a semiconductor may comprise an interior core comprising a first semiconductor; and an exterior shell comprising a different material than the first semiconductor. Such a semiconductor may be elongated and may have, at any point along a longitudinal section of such a semiconductor, a ratio of the length of the section to a longest width is greater than 4:1, or greater than 10:1, or greater than 100:1, or even greater than 1000:1.
Type:
Grant
Filed:
March 17, 2005
Date of Patent:
May 1, 2007
Assignee:
President & Fellows of Harvard College
Inventors:
Charles M. Lieber, Yi Cui, Xiangfeng Duan, Yu Huang