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  • Publication number: 20120267604
    Abstract: Kinked nanowires are used for measuring electrical potentials inside simple cells. An improved intracellular entrance is achieved by modifying the kinked nanowires with phospholipids.
    Type: Application
    Filed: September 24, 2010
    Publication date: October 25, 2012
    Inventors: Bozhi Tian, Ping Xie, Thomas J. Kempa, Charles M. Lieber, Itzhaq Cohen-Karni, Quan Qing, Xiaojie Duan
  • Patent number: 8575663
    Abstract: The present invention generally relates, in some aspects, to nanoscale wire devices and methods for use in determining analytes suspected to be present in a sample. Certain embodiments of the invention provide a nanoscale wire that has improved sensitivity, as the carrier concentration in the wire is controlled by an external gate voltage, such that the nanoscale wire has a Debye screening length that is greater than the average cross-sectional dimension of the nanoscale wire when the nanoscale wire is exposed to a solution suspected of containing an analyte. This Debye screening length (lambda) associated with the carrier concentration (p) inside nanoscale wire is adjusted, in some cases, by adjusting the gate voltage applied to an FET structure, such that the carriers in the nanoscale wire are depleted.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: November 5, 2013
    Assignee: President and Fellows of Harvard College
    Inventors: Charles M. Lieber, Xuan Gao, Gengfeng Zheng
  • Patent number: 9029836
    Abstract: In a method for fabricating a graphene structure, there is formed on a fabrication substrate a pattern of a plurality of distinct graphene catalyst materials. In one graphene synthesis step, different numbers of graphene layers are formed on the catalyst materials in the formed pattern. In a method for fabricating a graphene transistor, on a fabrication substrate at least one graphene catalyst material is provided at a substrate region specified for synthesizing a graphene transistor channel and at least one graphene catalyst material is provided at a substrate region specified for synthesizing a graphene transistor source, and at a substrate region specified for synthesizing a graphene transistor drain. Then in one graphene synthesis step, at least one layer of graphene is formed at the substrate region for the graphene transistor channel, and at the regions for the transistor source and drain there are formed a plurality of layers of graphene.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: May 12, 2015
    Assignee: President and Fellows of Harvard College
    Inventors: Jung-Ung Park, SungWoo Nam, Charles M. Lieber
  • Patent number: 7301199
    Abstract: The present invention relates generally to sub-microelectronic circuitry, and more particularly to nanometer-scale articles, including nanoscale wires which can be selectively doped at various locations and at various levels. In some cases, the articles may be single crystals. The nanoscale wires can be doped, for example, differentially along their length, or radially, and either in terms of identity of dopant, concentration of dopant, or both. This may be used to provide both n-type and p-type conductivity in a single item, or in different items in close proximity to each other, such as in a crossbar array. The fabrication and growth of such articles is described, and the arrangement of such articles to fabricate electronic, optoelectronic, or spintronic devices and components.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: November 27, 2007
    Assignee: President and Fellows of Harvard College
    Inventors: Charles M. Lieber, Xiangfeng Duan, Yi Cui, Yu Huang, Mark Gudiksen, Lincoln J. Lauhon, Jianfang Wang, Hongkun Park, Qingqiao Wei, Wenjie Liang, David C. Smith, Deli Wang, Zhaohui Zhong