Search Patents
  • Germanium substrate-type materials and approach therefor
    Publication number: 20060019466
    Abstract: Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to an upper surface of the Germanium containing material generally being inhibited. These approaches are applicable to a variety of devices including Germanium MOS capacitors, pMOSFETs and optoelectronic devices.
    Type: Application
    Filed: July 22, 2005
    Publication date: January 26, 2006
    Inventors: Ammar Nayfeh, Chi On Chui, Krishna Saraswat, Takao Yonehara
  • Thin film process monitoring techniques using acoustic waves
    Patent number: 5271274
    Abstract: A system and method is disclosed for measuring thickness of at least one film on a substrate by propagating an acoustic wave through the film on a substrate such that echo waves are generated and received by a transducer. An output signal is generated and processed to give a thickness value. The thickness valve is obtained from the time lapse between the propagated wave and receipt of the echo wave; by the frequency domain of the echo wave; or the phase of the echo wave.
    Type: Grant
    Filed: August 14, 1991
    Date of Patent: December 21, 1993
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: B. T. Khuri-Yakub, Sanjay Bhardwaj, Krishna Saraswat
  • Acoustic temperature and film thickness monitor and method
    Patent number: 5469742
    Abstract: An acoustic temperature and/or film thickness monitoring system for semiconductor wafers in which the velocity of acoustic waves in the wafer is employed to measure temperature and/or thickness.
    Type: Grant
    Filed: March 9, 1993
    Date of Patent: November 28, 1995
    Inventors: Yong J. Lee, Butrus T. Khuri-Yakub, Krishna C. Saraswat
  • DEPLETION-MODE FIELD-EFFECT TRANSISTOR-BASED PHOTOTRANSISTOR
    Publication number: 20140363917
    Abstract: A depletion-mode phototransitor is disclosed. The phototransistor having a substrate, a gate, a source, a drain and a channel. The source, drain and channel are doped to be the same type of semiconductor. The substrate can be made of silicon and/or germanium. The gate can be made of either aluminum or polysilicon.
    Type: Application
    Filed: August 15, 2014
    Publication date: December 11, 2014
    Applicant: The Board of Trustees of the Leland Stanford Junior University
    Inventors: YEUL NA, KRISHNA C. SARASWAT
  • DEPLETION-MODE FIELD-EFFECT TRANSISTOR-BASED PHOTOTRANSITOR
    Publication number: 20140264501
    Abstract: A depletion-mode phototransitor is disclosed. The phototransistor having a substrate, a gate, a source, a drain and a channel. The source, drain and channel are doped to be the same type of semiconductor. The substrate can be made of silicon and/or germanium. The gate can be made of either aluminum or polysilicon.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: SEMICONDUCTOR RESEARCH CORPORATION
    Inventors: Yeul Na, KRISHNA C. SARASWAT
  • Depletion-mode field-effect transistor-based phototransistor
    Patent number: 9343608
    Abstract: A depletion-mode phototransitor is disclosed. The phototransistor having a substrate, a gate, a source, a drain and a channel. The source, drain and channel are doped to be the same type of semiconductor. The substrate can be made of silicon and/or germanium. The gate can be made of either aluminum or polysilicon.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: May 17, 2016
    Assignee: Board of Regents, The University of Texas System
    Inventors: Yeul Na, Krishna C Saraswat
  • Low-temperature direct nitridation of silicon in nitrogen plasma generated by microwave discharge
    Patent number: 4715937
    Abstract: A process utilizing a microwave discharge technique for performing direct nitridation of silicon at a relatively low growth temperature of no more than about 500.degree. C. in a nitrogen plasma ambient without the presence of hydrogen or a fluorine-containing species. Nitrogen is introduced through a quartz tube. A silicon rod connected to a voltage source is placed in the quartz tube and functions as an anodization electrode. The silicon wafer to be treated is connected to a second voltage source and functions as the second electrode of the anodizing circuit. A small DC voltage is applied to the silicon wafer to make the plasma current at the wafer and the silicon rod equal and minimize contamination of the film.
    Type: Grant
    Filed: May 5, 1986
    Date of Patent: December 29, 1987
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Mehrdad M. Moslehi, Chi Y. Fu, Krishna Saraswat
  • Depletion-mode field-effect transistor-based phototransitor
    Patent number: 8896083
    Abstract: A depletion-mode phototransitor is disclosed. The phototransistor having a substrate, a gate, a source, a drain and a channel. The source, drain and channel are doped to be the same type of semiconductor. The substrate can be made of silicon and/or germanium. The gate can be made of either aluminum or polysilicon.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 25, 2014
    Assignee: Board of Regents, The University of Texas System
    Inventors: Yeul Na, Krishna C. Saraswat
  • HIGH-K DIELECTRIC FOR THERMODYNAMICALLY-STABLE SUBSTRATE-TYPE MATERIALS
    Publication number: 20070170541
    Abstract: Excellent capacitor-voltage characteristics with near-ideal hysteresis are realized in a capacitive-like structure that uses an electrode substrate-type material with a high-k dielectric layer having a thickness of a few-to-several Angstroms capacitance-based SiO2 equivalent (“TOx,Eq”). According to one particular example embodiment, a semiconductor device structure has an electrode substrate-type material having a Germanium-rich surface material. The electrode substrate-type material is processed to provide this particular electrode surface material in a form that is thermodynamically stable with a high-k dielectric material. A dielectric layer is then formed over the electrode surface material with the high-k dielectric material at a surface that faces, lies against and is thermodynamically stable with the electrode surface material.
    Type: Application
    Filed: March 31, 2003
    Publication date: July 26, 2007
    Inventors: Chi Chui, Krishna Saraswat, Baylor Triplett, Paul McIntyre
  • Solar cells having selective contacts and three or more terminals
    Publication number: 20150136214
    Abstract: Junction-less solar cells having three or more terminals are provided. Electron- and hole-selective contacts and interfaces are used in combination with two or more absorber layers having different bandgaps to provide multi-material solar cells that have no requirement for either lattice matching or current matching.
    Type: Application
    Filed: November 20, 2014
    Publication date: May 21, 2015
    Inventors: Raisul Islam, Gautam Shine, Aneesh Nainani, Krishna C. Saraswat
  • METHOD OF FORMING OF A SEMICONDUCTOR FILM, METHOD OF MANUFACTURE OF A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
    Publication number: 20100123218
    Abstract: This invention provides a method of forming semiconductor films on dielectrics at temperatures below 400° C. Semiconductor films are required for thin film transistors (TFTs), on-chip sensors, on-chip micro-electromechanical systems (MEMS) and monolithic 3D-integrated circuits. For these applications, it is advantageous to form the semiconductor films below 400° C. because higher temperatures are likely to destroy any underlying devices and/or substrates. This invention successfully achieves low temperature growth of germanium films using diboran. First, diboran gas is supplied into a reaction chamber at a temperature below 400° C. The diboran decomposes itself at the given temperature and decomposed boron is attached to the surface of a dielectric, for e.g., SiO2, forming a nucleation site and/or a seed layer. Second, source gases for semiconductor film formation, for e.g., SiH4, GeH4, etc., are supplied into the chamber, thereby forming a semiconductor film.
    Type: Application
    Filed: November 14, 2008
    Publication date: May 20, 2010
    Applicant: NEC CORPORATION
    Inventors: Munehiro TADA, Krishna SARASWAT
  • METHOD OF FORMING OF A SEMICONDUCTOR FILM, METHOD OF MANUFACTURE OF A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
    Publication number: 20110266550
    Abstract: This invention provides a method of forming semiconductor films on dielectrics at temperatures below 400° C. Semiconductor films are required for thin film transistors (TFTs), on-chip sensors, on-chip micro-electromechanical systems (MEMS) and monolithic 3D-integrated circuits. For these applications, it is advantageous to form the semiconductor films below 400° C. because higher temperatures are likely to destroy any underlying devices and/or substrates. This invention successfully achieves low temperature growth of germanium films using diboran. First, diboran gas is supplied into a reaction chamber at a temperature below 400° C. The diboran decomposes itself at the given temperature and decomposed boron is attached to the surface of a dielectric, for e.g., SiO2, forming a nucleation site and/or a seed layer. Second, source gases for semiconductor film formation, for e.g., SiH4, GeH4, etc., are supplied into the chamber, thereby forming a semiconductor film.
    Type: Application
    Filed: May 17, 2011
    Publication date: November 3, 2011
    Applicants: STANFORD UNIVERSITY, NEC CORPORATION
    Inventors: Munehiro TADA, Krishna SARASWAT
  • Method of forming of a semiconductor film, method of manufacture of a semiconductor device and a semiconductor device
    Patent number: 7968434
    Abstract: This invention provides a method of forming semiconductor films on dielectrics at temperatures below 400° C. Semiconductor films are required for thin film transistors (TFTs), on-chip sensors, on-chip micro-electromechanical systems (MEMS) and monolithic 3D-integrated circuits. For these applications, it is advantageous to form the semiconductor films below 400° C. because higher temperatures are likely to destroy any underlying devices and/or substrates. This invention successfully achieves low temperature growth of germanium films using diboran. First, diboran gas is supplied into a reaction chamber at a temperature below 400° C. The diboran decomposes itself at the given temperature and decomposed boron is attached to the surface of a dielectric, for e.g., SiO2, forming a nucleation site and/or a seed layer. Second, source gases for semiconductor film formation, for e.g., SiH4, GeH4, etc., are supplied into the chamber, thereby forming a semiconductor film.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: June 28, 2011
    Assignees: NEC Corporation, Stanford University
    Inventors: Munehiro Tada, Krishna Saraswat
  • SEMICONDUCTOR APPARATUSES AND METHOD THEREFOR
    Publication number: 20120138899
    Abstract: In accordance with one or more embodiments, an apparatus and method involves a channel region, barrier layers separated by the channel region and a dielectric on one of the barrier layers. The barrier layers have band gaps that are different than a band gap of the channel region, and confine both electrons and holes in the channel region. A gate electrode applies electric field to the channel region via the dielectric. In various contexts, the apparatus and method are amenable to implementation for both electron-based and hole-based implementations, such as for nmos, pmos, and cmos applications.
    Type: Application
    Filed: December 1, 2011
    Publication date: June 7, 2012
    Inventors: Aneesh Nainani, Krishna Chandra Saraswat
  • MEMORY CIRCUIT WITH QUANTUM WELL-TYPE CARRIER STORAGE
    Publication number: 20100149864
    Abstract: Data is stored in a quantum-well type structure with double gate control. According to an example embodiment, a transistor-based data storage circuit includes a gate, a back gate and a semiconductor channel between the gate and the back gate. Carriers are stored in a storage pocket structure in the channel, in response to biases applied to the gate and back gate. Current passing through the channel is sensed and used to detect the stored carriers and, correspondingly, a memory state of the storage circuit.
    Type: Application
    Filed: November 12, 2009
    Publication date: June 17, 2010
    Inventors: Mehmet Günhan Ertosun, Krishna Chandra Saraswat, Pawan Kapur
  • GERMANIUM SUBSTRATE-TYPE MATERIALS AND APPROACH THEREFOR
    Publication number: 20090061604
    Abstract: Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to an upper surface of the Germanium containing material generally being inhibited. These approaches are applicable to a variety of devices including Germanium MOS capacitors, pMOSFETs and optoelectronic devices.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 5, 2009
    Applicants: CANON KABUSHIKI KAISHA, The Board of Trustees of the Leland Stanford Junior University
    Inventors: Ammar Munir Nayfeh, Chi On Chui, Krishna C. Saraswat, Takao Yonehara
  • Memory circuit with quantum well-type carrier storage
    Patent number: 8064239
    Abstract: Data is stored in a quantum-well type structure with double gate control. According to an example embodiment, a transistor-based data storage circuit includes a gate, a back gate and a semiconductor channel between the gate and the back gate. Carriers are stored in a storage pocket structure in the channel, in response to biases applied to the gate and back gate. Current passing through the channel is sensed and used to detect the stored carriers and, correspondingly, a memory state of the storage circuit.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: November 22, 2011
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Mehmet Günhan Ertosun, Krishna Chandra Saraswat, Pawan Kapur
  • GERMANIUM SUBSTRATE-TYPE MATERIALS AND APPROACH THEREFOR
    Publication number: 20100159678
    Abstract: Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to an upper surface of the Germanium containing material generally being inhibited. These approaches are applicable to a variety of devices including Germanium MOS capacitors, pMOSFETs and optoelectronic devices.
    Type: Application
    Filed: March 8, 2010
    Publication date: June 24, 2010
    Applicants: CANON KABUSHIKI KAISHA, The Board of Trustees of the Leland Stanford Junior University
    Inventors: Ammar Munir Nayfeh, Chi On Chui, Krishna C. Saraswat, Takao Yonehara
  • Anything on Glass
    Publication number: 20140308801
    Abstract: Bonding of one or more semiconductor layers to a glass substrate is facilitated by depositing spin-on-glass (SOG) on the top of the semiconductor layers. The SOG is then bonded to the glass substrate, and after that, the original substrate of the semiconductor layers is removed. The resulting structure has the semiconductor layers disposed on the glass substrate with a layer of SOG sandwiched between. Bonding is always between glass and glass, and is independent of the composition of the target layers. Thus, it can provide “anything on glass”. For example, X-on-insulator (XOI), where X can be silicon, germanium, GaAs, GaN, SiC, graphene, etc. The spin-on-glass also helps with the surface roughness requirement.
    Type: Application
    Filed: April 11, 2014
    Publication date: October 16, 2014
    Applicant: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Jae Hyung Lee, Woo Shik Jung, Krishna C. Saraswat
  • Germanium substrate-type materials and approach therefor
    Patent number: 7919381
    Abstract: Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to an upper surface of the Germanium containing material generally being inhibited. These approaches are applicable to a variety of devices including Germanium MOS capacitors, pMOSFETs and optoelectronic devices.
    Type: Grant
    Filed: March 8, 2010
    Date of Patent: April 5, 2011
    Assignees: Canon Kabushiki Kaisha, The Board of Trustees of the Leland Stanford Junior University
    Inventors: Ammar Munir Nayfeh, Chi On Chui, Krishna C. Saraswat, Takao Yonehara
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