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  • Patent number: 8264092
    Abstract: Integrated circuits (Ia, Ib) on a wafer (2) comprise first and second integrated circuits (Ia, Ib) which each include an electric circuit (3). Only the first integrated circuits (Ia) comprise each at least one bump (8) not contacting their relevant electric circuits (3).
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: September 11, 2012
    Assignee: NXP B.V.
    Inventor: Heimo Scheucher
  • Patent number: 7247943
    Abstract: In an integrated circuit (1) having a substrate (3) and having a signal-processing circuit (4) which is produced at a surface (8) of the substrate (3), there is provided on the substrate surface (8) a protective layer (12) that has at least one aperture (13) through which a second contact pad (14) is electrically and mechanically connected to a first contact pad (9), wherein the second contact pad (14) is of a height of at least 15 ?m and projects laterally beyond the aperture (13) on all sides and is seated on the protective layer (12) by an overlap zone (z) that is closed on itself like a ring, wherein the overlap zone (z) has a constant width of overlap (w) of between 2 ?m and 15 ?m, and wherein at least one element of the signal-processing circuit (4), and preferably only one capacitor (5) of the signal-processing circuit (4), is provided opposite the first contact pad (9).
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: July 24, 2007
    Assignee: NXP B.V.
    Inventor: Heimo Scheucher