Abstract: A water treatment cartridge has a major and a minor axis in a horizontal cross-section and mounting lugs provided at the upper end of the cartridge, generally aligned with the major axis of the cartridge.
Abstract: Method and system for pumping a hyperthermal neutral beam source is described. The pumping system enables use of the hyperthermal neutral beam source for semiconductor processing applications, such as etching processes. An embodiment is described having a neutral beam source coupled to a processing chamber through a neutralizing grid. Control is provided by separately pumping the neutral beam source and the processing chamber.
Type:
Application
Filed:
September 29, 2005
Publication date:
March 29, 2007
Inventors:
Demetre Economou, Lee Chen, Vincent Donnelly
Abstract: A method is provided for creating a plurality of substantially uniform nano-scale features in a substantially parallel manner in which an array of micro-lenses is positioned on a surface of a substrate, where each micro-lens includes a hole such that the bottom of the hole corresponds to a portion of the surface of the substrate. A flux of charged particles, e.g., a beam of positive ions of a selected element, is applied to the micro-lens array. The flux of charged particles is focused at selected focal points on the substrate surface at the bottoms of the holes of the micro-lens array. The substrate is tilted at one or more selected angles to displace the locations of the focal points across the substrate surface. By depositing material or etching the surface of the substrate, several substantially uniform nanometer sized features may be rapidly created in each hole on the surface of the substrate in a substantially parallel manner.
Type:
Application
Filed:
May 5, 2009
Publication date:
June 3, 2010
Applicant:
University of Houston
Inventors:
Vincent Donnelly, Demetre Economou, Paul Ruchhoeft, Lin Xu, Sri Vemula, Manish Jain
Abstract: A method is provided for creating a plurality of substantially uniform nano-scale features in a substantially parallel manner in which an array of micro-lenses is positioned on a surface of a substrate, where each micro-lens includes a hole such that the bottom of the hole corresponds to a portion of the surface of the substrate. A flux of charged particles, e.g., a beam of positive ions of a selected element, is applied to the micro-lens array. The flux of charged particles is focused at selected focal points on the substrate surface at the bottoms of the holes of the micro-lens array. The substrate is tilted at one or more selected angles to displace the locations of the focal points across the substrate surface. By depositing material or etching the surface of the substrate, several substantially uniform nanometer sized features may be rapidly created in each hole on the surface of the substrate in a substantially parallel manner.
Type:
Application
Filed:
December 4, 2006
Publication date:
June 14, 2007
Applicant:
University of Houston
Inventors:
Vincent Donnelly, Demetre Economou, Paul Ruchhoeft, Lin Xu, Sri Vemula, Manish Jain
Abstract: The present invention provides a method of manufacturing a semiconductor device. The method includes depositing a metal oxide containing a dopant and having a high dielectric constant on a substrate; wherein the metal is aluminum or silicon and the dopant is zirconium or hafnium and etching the doped metal oxide with a plasma containing a halogenated compound.
Type:
Application
Filed:
July 10, 2001
Publication date:
January 16, 2003
Inventors:
Vincent M. Donnelly, Avinoam Kornblit, Kalman Pelhos
Abstract: A highly selective--greater than 100 to 1--etch for silicon, tantalum, tantalum silicide and tantalum nitride is achieved by using polyatomic halogen fluorides. The selectivity is achievable without employing plasmas or wet etching.
Type:
Grant
Filed:
July 27, 1983
Date of Patent:
February 12, 1985
Assignee:
AT&T Bell Laboratories
Inventors:
Joel M. Cook, Vincent M. Donnelly, Daniel L. Flamm, Dale E. Ibbotson, John A. Mucha
Abstract: The present invention provides a method of manufacturing a semiconductor device. The method includes depositing a metal oxide containing a dopant and having a high dielectric constant on a substrate; wherein the metal is aluminum or silicon and the dopant is zirconium or hafnium and etching the doped metal oxide with a plasma containing a halogenated compound.
Type:
Grant
Filed:
July 10, 2001
Date of Patent:
January 28, 2003
Assignee:
Agere Systems Inc.
Inventors:
Vincent M. Donnelly, Jr., Avinoam Kornblit, Kalman Pelhos
Abstract: Method and system for pumping a hyperthermal neutral beam source is described. The pumping system enables use of the hyperthermal neutral beam source for semiconductor processing applications, such as etching processes. An embodiment is described having a neutral beam source coupled to a processing chamber through a neutralizing grid. Control is provided by separately pumping the neutral beam source and the processing chamber.
Type:
Application
Filed:
February 18, 2008
Publication date:
June 12, 2008
Applicant:
TOKYO ELECTRON LIMITED
Inventors:
Demetre J. Economou, Lee Chen, Vincent M. Donnelly
Abstract: Endpoint detection during plasma-assisted etching is signalled by cessation or onset of spatially confined luminescence resulting from an etch reaction product. Sensitivity of the system is aided by an optically focused detector which selectively detects such fluorescence as associated with one or a small number of lithographic features.
Type:
Grant
Filed:
November 5, 1981
Date of Patent:
March 22, 1983
Assignee:
Bell Telephone Laboratories, Incorporated
Abstract: Method and system for pumping a hyperthermal neutral beam source is described. The pumping system enables use of the hyperthermal neutral beam source for semiconductor processing applications, such as etching processes. An embodiment is described having a neutral beam source coupled to a processing chamber through a neutralizing grid. Control is provided by separately pumping the neutral beam source and the processing chamber.
Type:
Grant
Filed:
September 29, 2005
Date of Patent:
April 15, 2008
Assignee:
Tokyo Electron Limited
Inventors:
Demetre J. Economou, Lee Chen, Vincent M. Donnelly
Abstract: Crystallographic etching in III-V semiconductor materials such as GaAs is achieved, for example, by utilizing a suitable halogen containing entity such as chlorine, bromine and iodine. This crystallographic etching yields in one embodiment essentially vertical surfaces of optical quality. Therefore, the procedure is useful in fabricating integrated circuits and in producing optical devices.
Type:
Grant
Filed:
October 1, 1982
Date of Patent:
August 9, 1983
Assignee:
Bell Telephone Laboratories, Incorporated
Inventors:
Vincent M. Donnelly, Daniel L. Flamm, Dale E. Ibbotson
Abstract: Method and system for pumping a hyperthermal neutral beam source is described. The pumping system enables use of the hyperthermal neutral beam source for semiconductor processing applications, such as etching processes. An embodiment is described having a neutral beam source coupled to a processing chamber through a neutralizing grid. Control is provided by separately pumping the neutral beam source and the processing chamber.
Type:
Grant
Filed:
February 18, 2008
Date of Patent:
December 29, 2009
Assignee:
Tokyo Electron Limited
Inventors:
Demetre J. Economou, Lee Chen, Vincent M. Donnelly
Abstract: A metal layer is formed on a surface of a Group III-V compound semiconductor by placing the surface in contact with a metal-containing solution and directing laser radiation through the solution. The radiation has a wavelength which is absorbed in the surface, thereby thermally inducing a chemical reaction between the surface and the solution and causing metal from the solution to be deposited on the surface. Specific examples of the deposition of Pt, Au and Zn on InP and GaAs are described.
Type:
Grant
Filed:
May 1, 1981
Date of Patent:
November 16, 1982
Assignee:
Bell Telephone Laboratories, Incorporated
Inventors:
Vincent M. Donnelly, Robert F. Karlicek, Jr.
Abstract: A system and method for rapid atomic layer etching (ALET) including a pulsed plasma source, with a spiral coil electrode, a cooled Faraday shield, a counter electrode disposed at the top of the tube, a gas inlet and a reaction chamber including a substrate support and a boundary electrode. The method includes positioning an etchable substrate in a plasma etching chamber, forming a product layer on the surface of the substrate, removing a portion of the product layer by pulsing a plasma source, then repeating the steps of forming a product layer and removing a portion of the product layer to form an etched substrate.
Type:
Application
Filed:
April 10, 2018
Publication date:
August 9, 2018
Applicant:
University of Houston System
Inventors:
Vincent M. Donnelly, Demetre J. Economou
Abstract: A low temperature procedure for depositing III-V semiconductor materials that offers the possibility of higher deposition rates together with abrupt junction formation has been found. This process involves the irradiation at a deposition substrate with a high power density radiation source of deposition gases such as organometallic materials, e.g., trimethyl gallium and trimethyl indium. By utilizing a sufficiently high power density, multiphoton processes are induced in the deposition gas that, in turn, lead to advantageous deposited materials.
Type:
Grant
Filed:
September 16, 1985
Date of Patent:
February 24, 1987
Assignee:
AT&T Laboratories
Inventors:
Vincent M. Donnelly, Robert F. Karlicek, Jr.
Abstract: A system and method for rapid atomic layer etching (ALET) including a pulsed plasma source, with a spiral coil electrode, a cooled Faraday shield, a counter electrode disposed at the top of the tube, a gas inlet and a reaction chamber including a substrate support and a boundary electrode. The method includes positioning an etchable substrate in a plasma etching chamber, forming a product layer on the surface of the substrate, removing a portion of the product layer by pulsing a plasma source, then repeating the steps of forming a product layer and removing a portion of the product layer to form an etched substrate.
Type:
Application
Filed:
December 13, 2010
Publication date:
June 16, 2011
Applicant:
UNIVERSITY OF HOUSTON
Inventors:
Vincent M. DONNELLY, Demetre J. ECONOMOU
Abstract: A system and method for rapid atomic layer etching (ALET) including a pulsed plasma source, with a spiral coil electrode, a cooled Faraday shield, a counter electrode disposed at the top of the tube, a gas inlet and a reaction chamber including a substrate support and a boundary electrode. The method includes positioning an etchable substrate in a plasma etching chamber, forming a product layer on the surface of the substrate, removing a portion of the product layer by pulsing a plasma source, then repeating the steps of forming a product layer and removing a portion of the product layer to form an etched substrate.
Type:
Grant
Filed:
April 10, 2018
Date of Patent:
December 24, 2019
Assignee:
UNIVERSITY OF HOUSTON SYSTEM
Inventors:
Vincent M. Donnelly, Demetre J. Economou
Abstract: A method for accurately monitoring and adjusting gas phase processes such as gas etching and chemical vapor deposition has been found. This method relies on the use of induced fluorescence. The gaseous phase used in the process to be monitored is probed by excitation with a suitable energy source. The emission from the gas phase induced through this excitation is then monitored and yields an accurate measure of concentration of the active species present. In turn the conditions of the fabrication process are adjusted based on these discerned concentrations.
Type:
Grant
Filed:
July 17, 1981
Date of Patent:
July 19, 1983
Assignee:
Bell Telephone Laboratories, Incorporated
Inventors:
Vincent M. Donnelly, Daniel L. Flamm, Robert F. Karlicek, Jr.
Abstract: Nanopantography is a method for patterning nanofeatures over large areas. Transfer of patterns defined by nanopantography using highly selective plasma etching, with an oxide layer of silicon serving as a hard mask, can improve patterning speed and etch profile. With this method, high aspect ratio features can be fabricated in a substrate with no mask undercut. The ability to fabricate complex patterns using nanopantography, followed by highly selective plasma etching, provides improved patterning speed, feature aspect ratio, and etching profile.
Type:
Application
Filed:
December 8, 2015
Publication date:
December 21, 2017
Inventors:
Vincent M. Donnelly, Demetre J. Economou, Siyuan Tian