Abstract: An improved write drive circuit which reduces the ringing and overshoot transients of an H-bridge drive circuit for a hard disk drive. The invention uses a damp circuit which minimizes the amount of capacitance on the outputs of the write driver while still accomplishing the dampening of the transient ring. In a preferred embodiment, the damp circuit is a ring clamp circuit which includes a resistor connected to each node of the write head. Each resistor is then connected to the emitter of a npn transistor where the transistors have a commonly enabled gate and a common collector connected to a source voltage.

Abstract: The invention relates to a DC/DC converter operating on the charge pump principle, regulated to a fixed, predetermined output voltage and comprising two charge pump capacitors switched in a switch matrix consisting of nine switches. A control circuit is provided capable of controlling the switches so that the charge pump is changed over between a charging phase and a discharge phase and which is capable of operating the charge pump in two modes having different voltage gain factors (1.5; 2).

Abstract: An educational toy (10) having a dodecahedron shape is formed with a different visual display on each planar face (17-28). A position sensing mechanism (50) is oriented inside the toy (10) to inform a microprocessor (62) which one of the planar faces (17-28) is in the “up” position. As the toy (10) is turned or moved a signal is generated to “power on” and a musical tune is played. When one of the planar faces (17-28) is stopped in the “up” position, the position sensing mechanism (50) informs the microprocessor (62) and an aural response corresponding to the visual display is transmitted through a speaker (44). If the toy (10) is left alone for a specified period of time, a warning tune is transmitted. If the toy (10) is still not moved thereafter, the toy (10) will automatically “power off”.

Abstract: A preferred embodiment of this invention includes an oxidizable layer (e.g. tantalum 48), an oxygen gettering layer (e.g. platinum/tantalum mixture 34) overlaying the oxidizable layer, a noble metal layer (e.g. platinum 36) overlaying the oxygen gettering layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlaying the noble metal layer. The novel structures presented provide electrical connection to high-dielectric-constant materials without the disadvantages of current structures. The oxygen gettering layer controls oxygen diffusion, minimizing the formation of a resistive layer either in the lower electrode or at the lower electrode/substrate interface. The oxygen gettering layer acts as a gettering site for oxygen, where the oxygen oxidizes the reactive metal portion of the layer, leaving the noble metal portion of the layer intact. While the oxides/suboxides (e.g.

Abstract: To provide a semiconductor device fuse, which does not damage the lower layer when it is cut by irradiation with a laser beam. In forming a fuse 2 by forming an electroconductive thin film on the surface of a semiconductor substrate and patterning it, a cut part 4 is constituted by installing an expanding part 5 in a narrow-width part 3, and the cut part 4 is cut by irradiation with a laser beam. Even if scattering of the intensity of the laser beam and scattering of the irradiation position occur, no damage occurs in the lower layer, and an electrical element can be formed even at the position directly under the fuse 2. The cut part 4 preferably has a circular shape.

Abstract: A preferred embodiment of this invention comprises a conductive lightly donor doped perovskite layer (e.g. lightly La doped BST 34), and a high-dielectric-constant material layer (e.g. undoped BST 36) overlaying the conductive lightly donor doped perovskite layer. The conductive lightly donor doped perovskite layer provides a substantially chemically and structurally stable electrical connection to the high-dielectric-constant material layer. A lightly donor doped perovskite generally has much less resistance than undoped, acceptor doped, or heavily donor doped HDC materials. The amount of donor doping to make the material conductive (or resistive) is normally dependent on the process conditions (e.g. temperature, atmosphere, grain size, film thickness and composition). This resistivity may be further decreased if the perovskite is exposed to reducing conditions.

Abstract: An improved micro-actuator position sensor which provides an accurate position signal for higher bandwidth control of a micro-actuator. The position sensor allows closed loop control of the micro-actuator position. Preferred embodiment micro-actuator sensors include a piezo-resistive stress sensor integrated within the springs, a capacitance sensor and magnetic reluctance sensor. Embodiments of the present invention are described in detail as integrated sensors for a micro-actuator used in hard disk drives. The sensor is integrated with a micro-actuator at the tip of the conventional actuator arm to improve the precision seeking capability of the actuator arm.

Abstract: A method and circuit for automatically centering the control loop bias current by sensing and “memorizing” the total steady state bias current used by the function block (VGA or VCO) through the use of both digital and analog memory elements. The present invention uses an auto-centering, high-impedance current driver to supply the bias current. This current driver cancels out offset currents by exploiting the high output impedance nature of a CMOS current driver using cascoded or resistor source de-generated FET devices.

Abstract: A Reed Solomon decoder which can perform high-speed decoding operation without significantly increasing the circuit scale. The Reed Solomon decoder includes the following: input parameter operator 309 which generates syndrome and erasure data for a data sequence, decoding operation processing unit 304 which performs the decoding operation using the aforementioned syndrome and erasure data based on the command code indicating the prescribed decoding operation, and which generates the error data and error position data, and correction operation executor 312 which performs the correction operation using the aforementioned error data and error position data. The decoding operation processing unit 304 has an multiplier and an adder which execute the product and sum operation of the Galois field in one step.

Abstract: To provide a type of frequency synthesizer having excellent characteristics and free of spurious component in the output signal. In frequency synthesizer (2), frequency divider (32) makes the frequency division value change periodically; external output signal OUT output from oscillator (31) is divided by the average frequency division value to generate a comparative signal; phase comparator (34) compares the phase of the comparative signal with the phase of the reference clock signal; oscillator (31) is controlled such that the frequency of external output signal OUT becomes a value equal to the frequency of the reference clock signal times the average frequency division value; the voltage applied to compensation circuit (10) is changed abruptly, and a compensating current is generated, and the ripple current generated is cancelled in synchronization to the reference clock signal.

Abstract: A method of initializing a CPU (14) to run emulation code from a debugger (11). Emulation logic (13) associated with the CPU (14) has a finite state machine (13b) with three modes: a reset mode in which no requests from said debugger or said CPU are serviced, a normal mode in which requests from said debugger are given priority, and a start-up mode in which only requests from said debugger are serviced. For initialization, the finite state machine (13b) is placed in reset mode and held in reset while the start-up mode is requested. When the reset mode is released the start-up mode is immediately serviced. This permits an initialization state to be cleanly applied to the CPU (14).

Abstract: An A/D conversion method which compares an input analog voltage and a comparison voltage, wherein the comparison voltage range corresponds to the upper half or lower half of the previous comparison voltage range if the determination of the previous bit was normal, and when the previous comparison was abnormal, then the comparison voltage range is outside of the previous comparison voltage range.

Abstract: A metal oxide capacitor is manufactured by sequentially laminating a metal oxide film and a secon electrode on a first electrode. The metal oxide film is formed and then heat-treated in an atmosphere with an oxygen pressure higher than 1 atm.

Abstract: An improved successive-approximation type ADC that uses both charge-scaled and voltage scaled approximation. The present invention provides a high noise immunity, high speed ADC using a differential voltage scaled DAC. The differential voltage scaled output scheme of the present invention advantageously applies voltage scaling to a capacitor on both inputs to the comparator. The dual voltage scaling is preferably done by connecting two switches to each tap on the bottom half of a resistor string, and no switches to the top half of the resistor string, using one set of tap switches for adjusting a charge on capacitor on the first input of the comparator and the second set of tap switches for adjusting a charge on capacitor on the second input of the comparator.

Abstract: The objective of the invention is to offer a Reed-Solomon decoding device in which it is possible to perform decoding calculations at high speed without greatly increasing the circuit scale.

Abstract: The objective of the invention is to provide a type of offset elimination circuit that can reliably remove the ripple error.

Abstract: A method for loading of program data with high speed and efficiency along with eliminating the need for software modification even if changes occur in the storage addresses and data length of the program data stored in the program memory. In order to load program data in a rewritable manner into a number of functional circuits FC0, FC1, . . . , FCn operating in accordance with the supplied program data, a program memory, for example, a ROM 10, a program loader 12, and program designating apparatus, for example, a microprocessor 14, are provided in the system.

Abstract: The objective is to provide a type of dynamic memory which does not adversely affect the data, even when noise is superimposed on the RAS signal.

Abstract: An improved method is provided for integrating HSQ into integrated circuit structures and processes, especially those requiring multiple levels of interconnect lines. In a preferred embodiment, interconnect lines 14 are first patterned and etched on a substrate 10. A low-k material such as hydrogen silsesquioxane (HSQ) 18 is spun across the surface of the wafer to fill areas between interconnect lines. A capping layer such as SiO.sub.2 20 is applied to on top of the low-k material. The HSQ is then heated to cure. A thick SiO.sub.2 planarization layer 22 may then be applied and planarized. In other embodiments, the HSQ and SiO.sub.2 process steps can be repeated for multiple layers of HSQ.

Abstract: Prevents deterioration of the element characteristics of the gate voltage tolerance and the like which is caused by the metallic contaminants that are sealed in the element forming region at the time of applying a trench separator in a SOI substrate. Polysilicon 12 is formed on the side walls of the trench 5, and the metallic contaminants within the element forming region are collected in this polysilicon 12.