Abstract: A semiconductor integrated circuit device includes a plurality of memory cells subdivided into array blocks each including M cell rows and N cell columns. The array blocks are arranged in array block rows and array block columns. Each cell of each cell row of each array block is coupled to an associated one of M word lines. Each cell of each cell column is selectively coupled to develop a data signal transmitted between an associated bit line pair including a primary bit line and a complementary bit line. A row decoder is coupled to provide a corresponding row address signal to each of the M word lines for addressing the cell rows.

Abstract: An effective method and apparatus for organizing and processing chunks of interrelated information (or "thoughts") using a digital computer is disclosed. The invention utilizes highly flexible, associative thought networks to organize and represent digitally-stored thoughts. A thought network specifies a plurality of thoughts, as well as network relationships among the thoughts. A graphical representation of the thought network is displayed, including a plurality of display icons corresponding to the thoughts, and a plurality of connecting lines corresponding to the relationships among the thoughts. Each of the thoughts is associated with one or more software application programs, such as a word processing or spreadsheet utility. Users are able to select a current thought conveniently by interacting with the graphical representation, and the current thought is processed by automatically invoking the application program associated with the current thought in a transparent manner.

Abstract: Method and apparatus for laser texturing a magnetic recording disk substrate, including a disk-loading and unloading conveyer, a pair of disk-carrying spindles and associated laser systems disposed in spaced-apart relationship, and a disk-handling mechanism disposed between the conveyer and the set of spindles and operative to obtain a first disk rom the conveyer, place it on a first spindle for texturing on one side, remove the partially textured first disk from the first spindle, flip it upside down and place it on a second spindle for texturing on the other side, while at the same time obtaining a second disk from the conveyor and loading it onto the first spindle for texturing on one side. A third disk is then removed from the conveyor and loaded onto the first spindle as the second disk is removed therefrom, flipped over and placed on the second spindle as the first disk is removed therefrom and returned to the conveyor.

Abstract: The SEmulation system provides four modes of operation: (1) Software Simulation, (2) Simulation via Hardware Acceleration, (3) In-Circuit Emulation (ICE), and (4) Post-Simulation Analysis. At a high level, the present invention may be embodied in each of the above four modes or various combinations of these modes. At the core of these modes is a software kernel which controls the overall operation of this system. The main control loop of the kernel executes the following steps: initialize system, evaluate active test-bench processes/components, evaluate clock components, detect clock edge, update registers and memories, propagate combinational components, advance simulation time, and continue the loop as long as active test-bench processes are present.

Abstract: An output driver for high speed integrated circuits includes a static driver portion and a transient driver portion. The static driver size can be adjusted to satisfy the minimal requirements for maintaining output DC voltage levels. The transient drivers include a feed-back control from the output voltage node. During a transition, the transient buffer control will sense the output level and feedback to turn off the transient driver whenever the output level rises/falls across the trip point. Accordingly the di/dt noise will drop quickly once the output has reached the trip point. The transient drivers can be larger to speed up switching speed. The buffer can use single power and ground pins or multiple power/ground pins.