Abstract: A three-dimensional stacked semiconductor package includes first and second chips, first and second adhesives, first and second wire bonds, a lead and an encapsulant. The chips are disposed on opposite sides of the lead, and the wire bonds contact the same side of the lead.

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a pillar and a routing line, and a ground plane. The pillar is press-fit into an opening in the ground plane, and the ground plane is electrically connected to the pad.

Abstract: A method of making a semiconductor chip assembly includes providing a semiconductor chip, a metal base, an insulative base and a routing line, wherein the chip includes a conductive pad, the metal base is disposed on a side of the insulative base that faces away from the chip, and the routing line is disposed on a side of the insulative base that faces towards the chip, then etching the metal base, forming an interconnect in a via, and forming a connection joint in an opening, wherein the via extends through the insulative base, the opening extends through the insulative base, the interconnect extends through the insulative base and is electrically connected to the routing line, and the connection joint electrically connects the routing line and the pad. Preferably, the opening extends through an insulative adhesive that attaches the routing line to the chip.

Abstract: A three-dimensional stacked semiconductor package device includes first and second semiconductor package devices and a conductive bond. The first device includes a first insulative housing, a first semiconductor chip and a first lead that is bent outside the first insulative housing. The second device includes a second insulative housing, a second semiconductor chip and a second lead that is flat outside the second insulative housing. The conductive bond contacts and electrically connects the leads.

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The routing line extends laterally from the pillar towards the chip, the pillar includes tapered sidewalls, and the chip and the pillar are embedded in the encapsulant and extend vertically beyond the routing line in the same direction.

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a pillar and a routing line, and a ground plane. The pillar is press-fit into an opening in the ground plane, and the ground plane is electrically connected to the pad.

Abstract: A method of making a semiconductor chip assembly includes providing a semiconductor chip that includes a conductive pad, then electrically connecting a conductive trace that includes a pillar and a routing line to the pad, and then press-fitting the pillar into an opening in a ground plane, thereby electrically connecting the ground plane and the pad.

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a metal filler, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The routing line is contiguous with and integral with the bumped terminal and extends laterally beyond the bumped terminal and the metal filler, and the metal filler contacts the bumped terminal in a cavity that extends through the bumped terminal.

Abstract: A method of making a three-dimensional stacked semiconductor package includes providing a first semiconductor chip assembly that includes a first chip, a first conductive trace and a first encapsulant, wherein the first conductive trace includes a first metal pillar, providing a second semiconductor chip assembly that includes a second chip, a second conductive trace and a second encapsulant, wherein the second encapsulant includes a second aperture, and then positioning the first and second assemblies such that the first assembly overlaps the second assembly and the first metal pillar extends into the second aperture.

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The routing line is contiguous with the bumped terminal and extends laterally beyond the bumped terminal and the metal pillar, and the metal pillar contacts and extends vertically beyond the bumped terminal.

Abstract: A method of making a semiconductor chip assembly includes providing a metal base, a routing line and a bumped terminal, then mechanically attaching a semiconductor chip to the metal base, the routing line and the bumped terminal, then forming an encapsulant, and then etching the metal base to form a metal pillar that contacts the bumped terminal.

Abstract: A method of making a semiconductor chip assembly includes forming a routing line on a metal base, etching the metal base wherein an unetched portion of the metal base forms a pillar, mechanically attaching a semiconductor chip to the routing line and the pillar wherein the chip includes a conductive pad, the routing line extends laterally from the pillar towards the chip and the chip and the pillar extend vertically beyond the routing line in the same direction, forming an encapsulant wherein the chip and the pillar are embedded in the encapsulant, and forming a connection joint that electrically connects the routing line and the pad.

Abstract: A method of making a semiconductor chip assembly includes providing a semiconductor chip that includes a conductive pad, electrically connecting a conductive trace that includes a pillar and a routing line to the pad, then inserting the pillar into an opening in a ground plane, and then forming a solder joint that electrically connects the pillar and the ground plane, wherein the ground plane is electrically connected to the pad.

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a metal pillar and a contact terminal, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The contact terminal includes a body and a flange that contact the metal pillar and are spaced from the routing line.

Abstract: A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The chip and the metal pillar are embedded in the encapsulant, the routing line extends laterally beyond the metal pillar towards the chip, and the metal pillar is welded to the routing line.

Abstract: A method of making a semiconductor chip assembly includes providing a metal base, a routing line, a bumped terminal and a metal filler, then mechanically attaching a semiconductor chip to the metal base, the routing line, the bumped terminal and the metal filler, then forming an encapsulant, then etching the metal base to expose the bumped terminal, and then grinding the bumped terminal to expose the metal filler.

Abstract: A three-dimensional stacked semiconductor package includes first and second semiconductor chip assemblies. The first semiconductor chip assembly includes a first chip, a first conductive trace and a first encapsulant, and the first conductive trace includes a first metal pillar. The second semiconductor chip assembly includes a second chip, a second conductive trace and a second encapsulant, and the second encapsulant includes a second aperture. The first metal pillar extends into the second aperture.

Abstract: A method of making a semiconductor chip assembly includes providing a metal base that includes a metal plate and a metal layer, providing a routing line that contacts the metal layer and an etch mask that contacts the metal plate, providing a semiconductor chip that includes a conductive pad, mechanically attaching the chip to the routing line, electrically connecting the routing line to the pad, and etching the metal base using a first wet chemical that is selective of the metal plate and then a second wet chemical etch that is selective of the metal layer and the etch mask to form a pillar from an unetched portion of the metal base that contacts the routing line.

Abstract: A positioner (20) for a disk drive (10) that includes a magnet assembly (52), a conductor assembly (54), and a control system (22) is provided herein. The magnet assembly (52) includes a pair of magnet arrays (56A) (56B) and a pair of spaced apart flux return plates (75A) (75B). The conductor assembly (54) includes at least a first coil array (80) and a second coil array (82) that are substantially co-planar. The control system (22) directs current to electrically excite the coil arrays (80) (82) to maintain a data transducer (50) on a target track (32) of a storage disk (28).

Abstract: An extremely secure method for keying source contents to a source storage medium provided to prevent use of unauthorized copies at minimal cost. The host processor combines a unique, immutable and verifiable physical attribute of a hard disk drive, i.e., the drive's defect list, with the content to be secured to write a corresponding fingerprinted encrypted content on a source medium. When a local processor wants to use the sanctioned source content, the fingerprinted content is read from a local storage medium. The local processor then decrypts and separates the defect list out of the source content and reads the local storage medium defect list. If the decrypted defect list matches the local storage medium defect list, then the local processor recognizes the local sanctioned medium and continues processing the source contents. Otherwise, a non-matching defect list indicates an unauthorized copy from the source to the local storage medium.