Patents Represented by Attorney, Agent or Law Firm Douglas G. Anderson
-
Patent number: 7434316Abstract: A locking sheath and knife combination is provided that includes a spring biased member that partially extends out of the handle of the knife and interacts with a catch on the sheath for securing the knife to the sheath. When the user wants to extract the knife from the sheath, the spring biased member is squeezed as the handle is grabbed, which rotates the spring biased member to be substantially fully contained within the handle of the knife, and is secured there by the lock spring plate. When the knife is inserted back into the sheath, a protrusion on the sheath interacts with the lock spring plate to automatically allow the spring biased member to rotate out of the handle, thereby securing the knife to the sheath.Type: GrantFiled: May 16, 2006Date of Patent: October 14, 2008Assignee: Leatherman Tool Group, Inc.Inventor: John P. Nenadic
-
Patent number: 6808564Abstract: A process for forming an epitaxial layer on a semiconductor wafer substrate is provided. The process comprises providing a semiconductor wafer substrate and an area for forming an epitaxial layer on said semiconductor wafer substrate. The formation area consists essentially of an epitaxial layer process chamber. The semiconductor wafer substrate is introduced into the epitaxial layer process chamber and an epitaxial layer is formed on at least one surface of the semiconductor wafer substrate. At least one epitaxial layer surface is substantially hydrophobic. Then, a chemical reagent is introduced into said epitaxial layer process chamber. The chemical reagent reacts with the epitaxial layer surface in situ to form an outer layer.Type: GrantFiled: March 12, 2003Date of Patent: October 26, 2004Assignee: SEH America, Inc.Inventor: Gerald R. Dietze
-
Patent number: 6794227Abstract: A semiconductor wafer manufacturing is disclosed wherein an SOI wafer is produced by annealing a polysilicon layer deposited on a substrate wafer in an oxygen-containing ambient, and annealing the wafer at high temperatures to form an oxide layer at the interface of the substrate wafer and polysilicon layer. During the high temperature anneal, the polycrystalline silicon layer also recrystallizes to a monocrystalline state, and replicates the lattice structure of the substrate wafer.Type: GrantFiled: June 28, 2002Date of Patent: September 21, 2004Assignee: SEH America, Inc.Inventor: Sergei V. Koveshnikov
-
Patent number: 6649427Abstract: A method for non-destructively evaluating the concentration of impurities in an epitaxial susceptor used in the processing of a semiconductor substrate. The method includes processing a semiconductor substrate of known impurity levels on the epitaxial susceptor, and measuring the impurity levels after epitaxial processing by drawing together at least a portion of the impurities and measuring the concentration of impurities that were drawn together. In one embodiment of the invention, a gettering layer is formed adjacent one or more surfaces of the substrate to getter impurities from the substrate into the gettering layer. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations that were transferred to the substrate from the epitaxial susceptor.Type: GrantFiled: November 14, 2001Date of Patent: November 18, 2003Assignee: SEH America, Inc.Inventors: Sergei V. Koveshnikov, Douglas G. Anderson
-
Patent number: 6632688Abstract: A method for evaluating the concentration of impurities in gases used in depositing an epitaxial layer on a semiconductor substrate. The method includes processing a semiconductor substrate of known impurity levels in an epitaxial reactor, and measuring the impurity levels after epitaxial processing by drawing together at least a portion of the impurities and measuring the concentration of impurities that were drawn together. In one embodiment of the invention, a gettering layer is formed adjacent one or more surfaces of the substrate to getter impurities from the substrate into the gettering layer. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations that were transferred to the substrate from the epitaxial susceptor.Type: GrantFiled: November 14, 2001Date of Patent: October 14, 2003Assignee: SEH America, Inc.Inventor: Sergei V. Koveshnikov
-
Patent number: 6630363Abstract: A method for evaluating the concentration of impurities in as-grown monocrystalline semiconductor ingots is provided. The method includes growing a monocrystalline semiconductor ingot, and measuring the bulk impurity levels of the ingot by drawing together at least a portion of the impurities and measuring the concentration of impurities that were drawn together. In one embodiment of the invention, a gettering layer is formed adjacent one or more surfaces of a sample of the monocrystalline semiconductor ingot to getter impurities from the sample into the gettering layer. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations that were grown into the monocrystalline semiconductor ingot.Type: GrantFiled: November 14, 2001Date of Patent: October 7, 2003Assignee: SEH America, Inc.Inventors: Sergei V. Koveshnikov, Douglas G. Anderson
-
Patent number: 6576501Abstract: A semiconductor wafer manufacturing process is disclosed wherein a double side polished wafer having oxygen induced stacking faults to provide extrinsic gettering on the back surface of the wafer. The process includes polishing the back surface of the wafer, and depositing a thin polysilicon film on the polished back surface. The wafer is then subjected to a thermal oxidation step, wherein the polysilicon film is consumed by the thermal oxidation step. The oxide layer is then stripped from the back surface, leaving oxygen induced stacking faults on the back surface of the wafer. The front surface of the wafer is then polished, thereby producing a double side polished wafer containing extrinsic gettering sites on the polished back surface.Type: GrantFiled: May 31, 2002Date of Patent: June 10, 2003Assignee: SEH America, Inc.Inventors: David A. Beauchaine, Timothy L. Brown, Sergei V. Koveshnikov, Romony San
-
Patent number: 6562128Abstract: A process for forming an epitaxial layer on a semiconductor wafer substrate is provided. The process comprises providing a semiconductor wafer substrate and an area for forming an epitaxial layer on said semiconductor wafer substrate. The formation area consists essentially of an epitaxial layer process chamber. The semiconductor wafer substrate is introduced into the epitaxial layer process chamber and an epitaxial layer is formed on at least one surface of the semiconductor wafer substrate. Then, a chemical reagent is introduced into the epitaxial layer process chamber. The chemical reagent reacts with the epitaxial layer surface in situ to form an outer protective oxide layer.Type: GrantFiled: May 17, 2002Date of Patent: May 13, 2003Assignee: SEH America, Inc.Inventors: Gerald R. Dietze, Oleg V. Kononchuk
-
Patent number: 6471771Abstract: A process for forming an epitaxial layer on a semiconductor wafer substrate is provided. The process comprises providing a semiconductor wafer substrate and an area for forming an epitaxial layer on said semiconductor wafer substrate. The formation area consists essentially of an epitaxial layer process chamber. The semiconductor wafer substrate is introduced into the epitaxial layer process chamber and an epitaxial layer is formed on at least one surface of the semiconductor wafer substrate. At least one epitaxial layer surface is substantially hydrophobic. Then, a chemical reagent is introduced into said epitaxial layer process chamber. The chemical reagent reacts with the epitaxial layer surface in situ to form an outer layer.Type: GrantFiled: November 28, 2001Date of Patent: October 29, 2002Assignee: SEH America, Inc.Inventor: Gerald R. Dietze
-
Patent number: 6423556Abstract: A method for evaluating the concentration of impurities in gases and equipment used in heat treatment of a semiconductor substrate is provided. The method includes processing a semiconductor substrate of known impurity levels in a heat treatment furnace, and measuring the impurity levels after the heat treatment processing by drawing together at least a portion of the impurities and measuring the concentration of impurities that were drawn together. In one embodiment of the invention, a gettering layer is formed adjacent one or more surfaces of the substrate to getter impurities from the substrate into the gettering layer. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations that were transferred to the substrate from the heat treatment process.Type: GrantFiled: November 14, 2001Date of Patent: July 23, 2002Assignee: SEH America, Inc.Inventors: Sergei V. Koveshnikov, Douglas G. Anderson
-
Patent number: 6416392Abstract: A method of lapping semiconductor wafers includes the step of transmitting sounds generated during the lapping process to a receiver, allowing the operator to use sound to more quickly detect problems associated with starting the lap process.Type: GrantFiled: November 30, 2000Date of Patent: July 9, 2002Assignee: SEH America, Inc.Inventors: Bettina M. Fitzgerald, Karl O. Swanson, Debra L. Zinser
-
Patent number: 6416391Abstract: A process for demounting silicon wafers from a polishing plate is provided, wherein a polishing plate containing wafers is subjected to a fluid stream to separate the wafer from the polishing plate. The wafer then passes through a fluid stream to rinse the wafer. Finally, the wafer is placed in a cassette that is submerged in a dilute solution of hydroflouric acid and water, and waits in que for a standard cleaning process. By storing the wafer in the solution containing hydroflouric acid, metal precipitation on the surface of the wafer is prevented.Type: GrantFiled: February 28, 2000Date of Patent: July 9, 2002Assignee: SEH America, Inc.Inventors: Oleg V. Kononchuk, Zbigniew J. Radzimski
-
Patent number: 6398382Abstract: An illumination apparatus for indicating the liquid level in a chemical storage tank is provided. The apparatus includes a transparent globe surrounding a light bulb mounted by flanges to upper portions of a storage tank, and being illuminated by an external electrical supply. Optionally the light bulb may be cooled by either allowing gas or air contained in the storage tank pass through a hole in the globe to interact with and cool the light bulb, or supplying a gas to the globe and circulating it around the light bulb. A shadow line is cast at the surface level of the liquid in the tank, and can be visibly seen through the translucent walls of the tank from some distance away.Type: GrantFiled: June 12, 2000Date of Patent: June 4, 2002Assignee: SEH America, Inc.Inventors: Allen R. Boyce, Matthew J. Brinkman
-
Patent number: 6352071Abstract: A wire saw slicing apparatus capable of slicing a cylindrical workpiece into wafers having a flat shape with reduced bow and warp. The slicing apparatus includes a layer of parallel wires moving with reciprocating or continuous movement while a workpiece is advanced through the wires, while an abrasive containing slurry is supplied. The parallel wires are wound around wire guides, wherein the outer sleeve of the wire guide has a higher thermal coefficient of expansion, and the substructure of the wire guide has a lower thermal coefficient of expansion, with the substructure having flanges at the axial ends that restrict the outer sleeve from expanding axially.Type: GrantFiled: June 20, 2000Date of Patent: March 5, 2002Assignee: SEH America, Inc.Inventors: Oleg V. Kononchuk, George Preece
-
Patent number: 6348870Abstract: An apparatus for determining a melt spill during Czochralski crystal growing processes, having a sensor or detector that allows the creation or cessation of a signal when the presence of melt spill is detected. This invention includes a sensor or detector that can operate in high temperature conditions without causing contamination to the crystal growth process. Any detected melt spill triggers an alarm so that potentially dangerous and costly situations may be avoided. The melt spill detector may be placed in any location advantageous to detect the melt spill, and may be incorporated into the components of the crystal growing apparatus.Type: GrantFiled: December 28, 2000Date of Patent: February 19, 2002Assignee: SEH America, Inc.Inventors: Douglas G. Anderson, Richard M. Aydelott
-
Patent number: 6338756Abstract: A process for forming an epitaxial layer on a semiconductor wafer substrate is provided. The process comprises providing a semiconductor wafer substrate and an area for forming an epitaxial layer on said semiconductor wafer substrate. The formation area consists essentially of an epitaxial layer process chamber. The semiconductor wafer substrate is introduced into the epitaxial layer process chamber and an epitaxial layer is formed on at least one surface of the semiconductor wafer substrate. At least one epitaxial layer surface is substantially hydrophobic. Then, a chemical reagent is introduced into said epitaxial layer process chamber. The chemical reagent reacts with the epitaxial layer surface in situ to form an outer layer.Type: GrantFiled: December 15, 2000Date of Patent: January 15, 2002Assignee: SEH America, Inc.Inventor: Gerald R. Dietze
-
Patent number: 6262855Abstract: An apparatus and method for inspecting the quality of a Nd-YAG laser beam after encountering an optic in a laser marking machine is provided. The apparatus includes a bezel that houses a filter medium that significantly increases the visible power intensity between the threshold-of-visibility to the point of saturation of a beam when viewed with an infrared electroviewer. The apparatus of the present invention is held in the path of the laser beam, and the beam is inspected with an infrared electroviewer. Occlusions in the power range of the beam found between the increased range of threshold-of-visibility to saturation point caused by imperfections in the optics can then be seen with an infrared electroviewer.Type: GrantFiled: November 23, 1998Date of Patent: July 17, 2001Assignee: Seh AmericaInventor: Mark J. Greisz
-
Patent number: 6258177Abstract: An apparatus and method for removing sedimentary waste from the grooves of a lapping machine is provided. A blade is inserted into a groove in a lapping plate, high pressure water is sprayed into the groove in the proximity of the blade, and the blade is drawn through the groove.Type: GrantFiled: March 29, 1999Date of Patent: July 10, 2001Assignee: SEH AmericaInventors: Arnold B. Eastman, Jr., Michael W. Shepherd
-
Patent number: 6254673Abstract: A crystal pulling apparatus is disclosed which employs the Czochralski method. The crystal pulling apparatus is operated while a containing a crucible of molten material, while maintaining the growing chamber under a controlled pressure of less than atmospheric. In the event of a vacuum pump unexpectedly ceasing operation, power to the heater is terminated, thus allowing the molten material to solidify. In such an event, a second vacuum pump can readily be attached to the growing chamber thus restoring pressure control, and allowing power to the heater to be restored.Type: GrantFiled: December 7, 1999Date of Patent: July 3, 2001Assignee: SEH America, Inc.Inventors: Aaron W. Johnson, Aaron L. LaBrie, Randall Spradlin
-
Patent number: 6190293Abstract: An exercise apparatus is presented that allows for adjustments in height, and optionally width between hand grips, while maintaining an ergonomic grip that is substantially parallel to the user's body, regardless of the adjustment used.Type: GrantFiled: May 11, 2000Date of Patent: February 20, 2001Inventors: Richard Donald Schuyler, Richard Michael Aydelott