Patents Represented by Attorney, Agent or Law Firm Eric J. Robinson
  • Patent number: 6750838
    Abstract: In an active matrix type display device including two source line side drivers for driving a plurality of pixel TFTs, one gate line side driver, two line memories respectively including at least first and second memories, and a controller for controlling the first and second line memories, storing and transmitting of picture data of the two line memories are switched to transmit the data to the two source line side drivers at the same time.
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: June 15, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiharu Hirakata
  • Patent number: 6750835
    Abstract: A novel driving method is provided in which source line inverting drive or dot inverting drive is performed for a case of driving a plurality of source lines by one D/A converter circuit in a source signal line driver circuit of an active matrix image display drive that corresponds to digital image signal input. In a first driving method of the present invention, two systems of grey-scale electric power supply lines are supplied to a source signal line driver circuit in order to obtain output having differing polarities from a D/A converter circuit, switches for connecting to the two systems of grey-scale electric power supply lines are prepared in each D/A converter circuit, the grey-scale electric power supply lines connected to each D/A converter circuit are switched in accordance with a control signal input to the switches, and source line inverting drive or dot inverting drive are performed.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: June 15, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Azami
  • Patent number: 6748037
    Abstract: A digital broadcasting receiver is provided which can reproduce a carrier quickly and capture a desired signal at high speed. A carrier reproduction phase error detection circuit (6) detects a phase error voltage in accordance with a demodulation output obtained by demodulating a demodulated wave of a modulated wave during a predetermined section in a header section. A peak number calculation circuit (92) calculates an error frequency between a desired reception frequency and a reproduction carrier frequency in accordance with the phase error voltage. A differential coefficient calculation circuit (94) calculates the polarity of the error frequency. A step frequency control circuit (96) converts the calculated error frequency having the calculated polarity into a step frequency width for automatic frequency control. The reproduction carrier frequency is scanned at the converted step frequency width until a frame sync is established after the frame sync is detected.
    Type: Grant
    Filed: May 18, 2000
    Date of Patent: June 8, 2004
    Assignee: Kabushiki Kaisha Kenwood
    Inventors: Hisakazu Katoh, Akinori Hashimoto, Kenichi Shiraishi, Akihiro Horii, Shoji Matuda
  • Patent number: 6748033
    Abstract: To provide a de-interleave circuit used for a BS digital broadcasting receiver. The de-interleave circuit is provided with less memory. An address data generator (3) supplies address data (A) to a de-interleave memory (4) in a de-interleave order. Each main signal is read from an address location in the de-interleave memory (4) specified by address data (A), and a following main signal is interleaved and written in that address location of the memory. As a result, the de-interleave memory (4) only requires space for one superframe.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: June 8, 2004
    Assignee: Kabushiki Kaisha Kenwood
    Inventors: Kenichi Shiraishi, Soichi Shinjo, Akihiro Horii
  • Patent number: 6747288
    Abstract: A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high. By performing the formation of the pixel electrode 127, the source region 123 and the drain region 124 by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: June 8, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideaki Kuwabara, Yasuyuki Arai
  • Patent number: 6746901
    Abstract: To realize TFT enabling high-speed operation by fabricating a crystalline semiconductor film in which positions and sizes of crystal grains are controlled and using the crystalline semiconductor film in a channel forming region of TFT, a film thickness is stepped by providing a stepped difference in at least one layer of a matrix insulating film among a plurality of matrix insulating films having refractive indices different from each other. By irradiating laser beam from a rear face side of a substrate (or both sides of a surface side and the rear face side of the substrate), there is formed an effective intensity distribution of laser beam with regard to a semiconductor film and there is produced a temperature gradient in correspondence with a shape of the stepped difference and a distribution of the film thickness of the matrix insulating film in the semiconductor film.
    Type: Grant
    Filed: May 3, 2001
    Date of Patent: June 8, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenji Kasahara, Ritsuko Kawasaki, Hisashi Ohtani
  • Patent number: 6744008
    Abstract: For crystallizing an amorphous semiconductor film by means of irradiation of laser beams, a top surface and a back surface of the amorphous semiconductor film are irradiated with the laser beams. In this case, an effective energy intensity Io of the laser beams to be applied onto the top surface and an effective energy intensity Io′ of the laser beams to be applied onto the back surface satisfy the relationship of 0<Io′/Io<1 or 1<Io′/Io. Thus, a laser annealing method capable of providing a crystalline semiconductor film with large grain diameters can be provided.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: June 1, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenji Kasahara, Ritsuko Kawasaki, Hisashi Ohtani, Koichiro Tanaka
  • Patent number: 6743650
    Abstract: In an active matrix semiconductor display device in which pixel TFTs and driver circuit TFT are formed on the same substrate in an integral manner, the cell gap is controlled by gap retaining members that are disposed between a pixel area and driver circuit areas. This makes it possible to provide a uniform cell thickness profile over the entire semiconductor display device. Further, since conventional grainy spacers are not used, stress is not imposed on the driver circuit TFTs when a TFT substrate and an opposed substrate are bonded together. This prevents the driver circuit TFTs from being damaged.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: June 1, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiharu Hirakata, Takeshi Nishi, Shunpei Yamazaki
  • Patent number: 6740547
    Abstract: A process for fabricating thin film transistors is disclosed, which comprises a two-step laser annealing process as follows: crystallizing the channel portion by irradiating the channel portion with an irradiation beam; and modifying the electric properties of the source and the drain by irradiating the source and the drain with an irradiation beam in a step independent to the first step of crystallizing the channel portion.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: May 25, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hongyong Zhang
  • Patent number: 6740938
    Abstract: This invention is intended to provide a technique for improving characteristics of a TFT and realizing a structure of the TFT optimum for driving conditions of a pixel section and a driving circuit by using a small number of photomasks. The TFT includes a first electrode, a first insulating film put between a semiconductor film and the first electrode, a second electrode, and a second insulating film put between the semiconductor film and the second electrode. The first electrode and the second electrode are overlapped with each other, with a channel formation region of the semiconductor film put between the first electrode and the second electrode, and a constant voltage is always applied to the first electrode.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: May 25, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akira Tsunoda, Shunpei Yamazaki, Jun Koyama, Mai Osada
  • Patent number: 6738005
    Abstract: A D/A conversion circuit with a small area is provided. In the D/A conversion circuit, according to a digital signal transmitted from address lines of an address decoder, one of four gradation voltage lines is selected. A circuit including two N-channel TFTs is connected in series to a circuit including two P-channel TFT, and a circuit including the circuits connected in series to each other is connected in parallel to each of the gradation voltage lines. Further, an arrangement of the circuit including the two N-channel TFTs and the circuit including the two P-channel TFTs is reversed for every gradation voltage line. By this, the crossings of wiring lines in the D/A conversion circuit becomes small and the area can be made small.
    Type: Grant
    Filed: January 24, 2002
    Date of Patent: May 18, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Mitsuaki Osame, Yukio Tanaka, Munehiro Azami, Naoko Yano, Shou Nagao
  • Patent number: 6737676
    Abstract: A thin film field effect transistors and manufacturing method for the same are described. The channel region of the transistor is spoiled by an impurity such as oxygen, carbon, nitrogen. The photosensitivity of the channel region is reduced by the spoiling impurity and therefore the transistor is endowed with immunity to illumination incident thereupon which would otherwise impair the normal operation of the transistor. The spoiling impurity is not introduced into transistors which are located in order not to receive light rays.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: May 18, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 6737673
    Abstract: There is provided a semiconductor device using a semiconductor thin film having high crystallinity, which is formed by a manufacturing method with high productivity. When active layers of an amorphous silicon film are crystallized, germanium is used as a catalytic element for facilitating crystallization. When a heat treatment is carried out in a state where the active layers are in contact with a germanium film through an opening portion provided in a mask insulating film, the active layers made of a polysilicon film are obtained by crystal growth in a lateral direction.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: May 18, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 6737304
    Abstract: A semiconductor device having high operating performance and reliability is disclosed, and its fabrication process is also disclosed. In an n-channel type TFT 302, an Lov region 207 is disposed, whereby a TFT structure highly resistant to hot carriers is realized. Further, in an n-channel type TFT 304 forming a pixel portion, Loff regions 217 to 220 are disposed, whereby a TFT structure having a low OFF-current value is realized. In this case, in the Lov region, the n-type impurity element exists at a concentration higher than that of the Loff regions, and the whole of the n-type impurity region (b) which constitutes the Lov region is sufficiently activated by optical annealing, so that a good junction portion is formed between the n-type impurity region and the channel forming region.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: May 18, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hidehito Kitakado
  • Patent number: 6737674
    Abstract: There is provided a method for eliminating influence of nickel element from a crystal silicon film obtained by utilizing nickel. A mask made of a silicon oxide film is formed on an amorphous silicon film. Then, the nickel element is held selectively on the surface of the amorphous silicon film by utilizing the mask. Next, a heat treatment is implemented to grow crystal. This crystal growth occurs with the diffusion of the nickel element. Next, phosphorus is doped to a region by using the mask. Then, another heat treatment is implemented to remove the nickel element from the pattern under the mask through the course reverse to the previous course in diffusing the nickel element in growing crystal. Then, the silicon film is patterned by utilizing the mask again to form a pattern. Thus, the pattern of the active layer which has high crystallinity and from which the influence of the nickel element is removed may be obtained without increasing masks in particular (i.e. without complicating the process).
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: May 18, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Hideto Ohnuma
  • Patent number: 6734050
    Abstract: A spin addition method for catalyst elements is simple and very important technique, because the minimum amount of a catalyst element necessary for crystallization can be easily added by controlling the catalyst element concentration within a catalyst element solution, but there is a problem in that uniformity in the amount of added catalyst element within a substrate is poor. The non-uniformity in the amount of added catalyst element within the substrate is thought to influence fluctuation in crystallinity of a crystalline semiconductor film that has undergone thermal crystallization, and exert a bad influence on the electrical characteristics of TFTs finally structured by the crystalline semiconductor film. The present invention solves this problem with the aforementioned conventional technique.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: May 11, 2004
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Misako Nakazawa, Toshiji Hamatani, Naoki Makita
  • Patent number: 6734499
    Abstract: An insulated gate field effect transistor comprises a non-single-crystalline semiconductor layer formed on a substrate, a gate electrode is formed on a portion of the surface of said semiconductor layer, and a gate insulating film is disposed between said gate electrode and said semiconductor layer. A non-single-crystalline channel region is defined within said semiconductor layer just below said gate electrode. A source region and a drain region are transformed from and defined within said semiconductor layer immediately adjacent to said channel region in an opposed relation, said source and drain regions being crystallized to a higher degree than that of said channel region by selectively irradiating portions of said semiconductor layer using said gate electrode as a mask.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: May 11, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 6730992
    Abstract: To a provide a method of forming a layered film of a silicon nitride film and a silicon oxide film on a glass substrate in a short time without requiring a plurality of film deposition chambers. In a thin film transistor, a layered film including a silicon nitride oxide film (12) is formed between a semiconductor layer (13) and a substrate (11) using the same chamber. The silicon nitride oxide film has a continuously changing composition ration of nitrogen or oxygen. An electric characteristic of the TFT is thus improved.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: May 4, 2004
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Mitsunori Sakama, Noriko Ishimaru, Masahiko Miwa, Mitinori Iwai
  • Patent number: 6729922
    Abstract: A light-emitting device is produced at a decreased cost by inspecting defects in the pixels in the step of fabrication. TFTs possessed by the pixels on the element substrate and TFTs possessed by the peripheral drive circuits are inspected by using the inspection device to detect defects in a step in a process for finishing the light-emitting device. This makes it possible to decrease the loss that results when the defective products are processed through up to the final step, and to improve the yield by repairing the defective products in a step of repairing.
    Type: Grant
    Filed: May 30, 2001
    Date of Patent: May 4, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Masaaki Hiroki
  • Patent number: 6730550
    Abstract: To provide a laser apparatus and a laser annealing method with which a crystalline semiconductor film with a larger crystal grain size is obtained and which are low in their running cost. A solid state laser easy to maintenance and high in durability is used as a laser, and laser light emitted therefrom is linearized to increase the throughput and to reduce the production cost as a whole. Further, both the front side and the back side of an amorphous semiconductor film is irradiated with such laser light to obtain the crystalline semiconductor film with a larger crystal grain size.
    Type: Grant
    Filed: August 10, 2000
    Date of Patent: May 4, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Koichiro Tanaka, Kenji Kasahara, Ritsuko Kawasaki