Patents Represented by Attorney Eschweiler & Associates, LLC
  • Patent number: 8242469
    Abstract: An apparatus is provided for reducing particle contamination in an ion implantation system. The apparatus has an enclosure having an entrance, an exit, and at least one louvered side having a plurality of louvers defined therein. A beamline of the ion implantation system passes through the entrance and exit, wherein the plurality of louvers of the at least one louvered side are configured to mechanically filter an edge of an ion beam traveling along the beamline. The enclosure can have two louvered sides and a louvered top, wherein respective widths of the entrance and exit of the enclosure, when measured perpendicular to the beamline, are generally defined by a position of the two louvered sides with respect to one another. One or more of the louvered sides can be adjustably mounted, wherein the width of one or more of the entrance and exit of the enclosure is controllable.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: August 14, 2012
    Assignee: Axcelis Technologies, Inc.
    Inventor: Neil K. Colvin
  • Patent number: 8243532
    Abstract: A structure and method for increasing the operating speed and reducing the overall programming time of a memory array are provided herein. The method and structure reduce the maximum write current consumption, for writing a plurality of data bits to a NVM array, by writing the data bits sharing an activated word line at different times (e.g., activating bit lines associated with an activated word line at different times). The write operation of respective data bits, which individually utilize only a fraction of the overall write window of the bits, are interleaved so that the maximum write current of respective bits are offset in time from the maximum write current of another bit, allowing a larger number of data bits to be written without exceeding system specifications (e.g., maximum current) and reducing overall memory write time.
    Type: Grant
    Filed: February 9, 2010
    Date of Patent: August 14, 2012
    Assignee: Infineon Technologies AG
    Inventors: Thomas Nirschl, Christoph Bukethal, Jan Otterstedt
  • Patent number: 8241425
    Abstract: The present invention is directed to an apparatus and method of forming a thermos layer surrounding a chuck for holding a wafer during ion implantation. The thermos layer is located below a clamping surface, and comprises a vacuum gap and an outer casing encapsulating the vacuum gap. The thermos layer provides a barrier blocking condensation to the outside of the chuck within a process chamber by substantially preventing heat transfer between the chuck when it is cooled and the warmer environment within the process chamber.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: August 14, 2012
    Assignee: Axcelis Technologies, Inc.
    Inventors: William D. Lee, Ashwin M. Purohit, Marvin R. LaFontaine
  • Patent number: 8237135
    Abstract: An ion implantation method and system that incorporate beam neutralization to mitigate beam blowup, which can be particularly problematic in low-energy, high-current ion beams. The beam neutralization component can be located in the system where blowup is likely to occur. The neutralization component includes a varying energizing field generating component that generates plasma that neutralizes the ion beam and thereby mitigates beam blowup. The energizing field is generated with varying frequency and/or field strength in order to maintain the neutralizing plasma while mitigating the creation of plasma sheaths that reduce the effects of the neutralizing plasma.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: August 7, 2012
    Assignee: Axcelis Technologies, Inc.
    Inventors: Bo H. Vanderberg, William F. DiVergilio
  • Patent number: 8233854
    Abstract: A polar modulator for generating a polar-modulated signal based on amplitude information and phase information includes a phase-locked loop which is implemented to enable a setting of a frequency depending on a control value to obtain a phase-locked loop output signal. The polar modulator further includes a modulation means which is implemented to combine an amplitude modulation signal derived from the amplitude information with the phase-locked loop output signal to generate the polar-modulated signal. The polar modulator further includes a control value generator which is implemented to high-pass filter an amplitude signal derived from the amplitude information, to obtain a high-pass filtered amplitude signal, wherein the control value generator is implemented to combine the high-pass filtered amplitude signal with a phase signal based on the phase information to generate the control value signal representing the control value.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: July 31, 2012
    Assignee: Intel Mobile Communications GmbH
    Inventors: Giuseppe Li Puma, Michael Feltgen
  • Patent number: 8227773
    Abstract: A glitch duration threshold is determined based on an allowable dose uniformity, a number of passes of a workpiece through an ion beam, a translation velocity, and a beam size. A beam dropout checking routine repeatedly measures beam current during implantation. A beam dropout counter is reset each time beam current is sufficient. On a first observation of beam dropout, a counter is incremented and a position of the workpiece is recorded. On each succeeding measurement, the counter is incremented if beam dropout continues, or reset if beam is sufficient. Thus, the counter indicates a length of each dropout in a unit associated with the measurement interval. The implant routine stops only when the counter exceeds the glitch duration threshold and a repair routine is performed, comprising recalculating the glitch duration threshold based on one fewer translations of the workpiece through the beam, and performing the implant routine starting at the stored position.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: July 24, 2012
    Assignee: Axcelis Technologies, Inc.
    Inventor: Shu Satoh
  • Patent number: 8228106
    Abstract: The present disclosure relates to on-chip self calibrating delay monitoring circuitry.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: July 24, 2012
    Assignee: Intel Mobile Communications GmbH
    Inventors: Thomas Baumann, Christian Pacha, Stephan Henzler, Peter Huber
  • Patent number: 8227768
    Abstract: An ion implantation system configured to produce an ion beam is provided, wherein an end station has a robotic architecture having at least four degrees of freedom. An end effector operatively coupled to the robotic architecture selectively grips and translates a workpiece through the ion beam. The robotic architecture has a plurality of motors operatively coupled to the end station, each having a rotational shaft. At least a portion of each rotational shaft generally resides within the end station, and each of the plurality of motors has a linkage assembly respectively associated therewith, wherein each linkage assembly respectively has a crank arm and a strut. The crank arm of each linkage assembly is fixedly coupled to the respective rotational shaft, and the strut of each linkage assembly is pivotally coupled to the respective crank arm at a first joint, and pivotally coupled to the end effector at a second joint.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: July 24, 2012
    Assignee: Axcelis Technologies, Inc.
    Inventors: Theodore Smick, Geoffrey Ryding, Ronald F. Horner, Paul Eide, Marvin Farley, Kan Ota
  • Patent number: 8226142
    Abstract: A workpiece gripping integrity device and method are provided having a charge-transfer sensing device configured to detect a change in charge associated with a gripper arm assembly based on a grip condition thereof. The charge-transfer sensing device can be configured to detect a change in capacitance between the gripper arm assembly and ground, wherein the change in capacitance is based on a grip condition of the gripper arm assembly associated with a plurality of grippers contacting the workpiece.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: July 24, 2012
    Assignee: Axcelis Technologies, Inc.
    Inventors: Joseph D. Gillespie, Sor Kham, Robert E. Wayne
  • Patent number: 8228658
    Abstract: A method for clamping a workpiece involves placing the workpiece on a clamping surface of an electrostatic clamp. A clamping voltage is applied to the electrostatic clamp at a first frequency, therein providing a first clamping force between the workpiece and the electrostatic clamp. The application of clamping voltage at the first frequency is halted and another clamping voltage at a second frequency is applied to the electrostatic clamp, therein providing a second clamping force between the workpiece and the electrostatic clamp. The second frequency is greater than the first frequency, wherein the second clamping force is less than the first clamping force. The application of the clamping voltage at the second frequency is then halted, and the workpiece is removed from the electrostatic clamp. The clamping voltage can be controlled based on a set of performance criteria, such as a desired minimum clamping force and a maximum de-clamp time.
    Type: Grant
    Filed: February 8, 2007
    Date of Patent: July 24, 2012
    Assignee: Axcelis Technologies, Inc.
    Inventor: Ashwin M. Purohit
  • Patent number: 8223628
    Abstract: A method of transmitting data includes generating interleaved data. The method also includes converting the interleaved data into a modulated signal, and transmitting the modulated signal. The interleaved data is also stored, for example, in a buffer. The method further includes determining whether a retransmission of the modulated signal is required, and retransmitting the interleaved data based on a result of that determination.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: July 17, 2012
    Assignee: Lantiq Deutschland GmbH
    Inventor: Umashankar Thyagarajan
  • Patent number: 8223869
    Abstract: A method for detection of a control channel includes receiving data transmitted via the control channel. A control channel receive quality is estimated based on a metric difference between a metric of a known final trellis state and a minimum metric amongst the metrics of the trellis states based on the received data. It is decided whether or not to detect the control channel depending on the estimated control channel receive quality.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: July 17, 2012
    Assignee: Intel Mobile Communications GmbH
    Inventors: Mauro Bottero, Jens Berkmann
  • Patent number: 8218683
    Abstract: The invention relates to a method for compensation for any phase and/or amplitude error in a receiver having a complex processing branch and a complex-conjugate processing branch, wherein an error-compensated complex signal component is determined by subtraction of a complex-conjugate signal component and to which a correction parameter is applied, from a complex signal component. The correction parameter is determined on the basis of a function of a quotient of the complex signal component and the complex-conjugate signal component.
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: July 10, 2012
    Assignee: Infineon Technologies AG
    Inventors: Andreas Menkhoff, Bernhard Aumayer
  • Patent number: 8218344
    Abstract: A bidirectional inverter is disclosed, the inverter including DC terminals and being connectable to a grid via grid AC terminals. The inverter includes a first subinverter and a second subinverter, both subinverters being connected in parallel to the DC terminals, and being connected in parallel to the grid AC terminals by subinverter AC terminals. Each subinverter includes a full bridge and a switchable freewheel path, both being configured to drive current between the grid AC terminals in a driving direction, and configured to block a current between the grid AC terminals in a blocking direction opposite the driving direction. The driving direction of the first subinverter is the blocking direction of the second subinverter.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: July 10, 2012
    Assignee: SMA Solar Technologies AG
    Inventor: Burkard Mueller
  • Patent number: 8216444
    Abstract: The invention relates to a device for breaking the electrical continuity of the stream of caustic soda produced in mercury-cathode chlor-alkali plants. The device is comprised of a vessel internally subdivided into three compartments by two flow-conveying septa, the three compartments being in communication and defining a caustic soda tortuous flow-path allowing the centrifugal deposition of mercury microdroplets released by the upstream amalgam decomposer.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: July 10, 2012
    Assignee: Industrie de Nora S.p.A.
    Inventors: Giovanni Meneghini, Raffaello Bertin
  • Patent number: 8213133
    Abstract: A load breaker arrangement includes first and second input terminals, respectively, and first and second output terminals. The arrangement also includes two relays connected in series with one another, wherein the two relays are coupled between the second input terminal and the second output terminal, a semiconductor switch connected in parallel with one of the two relays, and a third relay coupled between the first input terminal and the first output terminal. A control circuit, in a load breaker mode, turns on the semiconductor switch while the two relays and the third relay are closed, then opens the one of the two relays in parallel with the semiconductor switch, then opens the semiconductor switch to break a current between the second input and second output terminals, and then opens the other of the two relays not in parallel with the semiconductor switch and opens the third relay.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: July 3, 2012
    Assignee: SMA Solar Technology AG
    Inventors: Stefan Buchhold, Sven Bremicker, Frank Greizer, Günther Cramer
  • Patent number: 8212704
    Abstract: Aspects of the present disclosure relate to floating point timers and counters that are used in a variety of contexts. In some implementations, a floating point counter can be used to generate a wave form made up of a series of pulses with different pulse lengths. An array of these floating point counters can be used to implement a pool of delays. In other implementations, an array of floating point counters can be used to analyze waveforms on a number of different communication channels. Analysis of such waveforms may be useful in automotive applications, such as in wheel speed measurement for example, as well as other applications.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: July 3, 2012
    Assignee: Infineon Technologies AG
    Inventors: Ljudmil Anastasov, Jens Barrenscheen
  • Patent number: 8213542
    Abstract: Circuitry separates a modulation signal into digital sign and magnitude signal components. The digital magnitude signal is converted to an analog magnitude signal. The analog magnitude signal is the mixed with an in-phase or quadrature carrier signal under the influence of the digital sign signal and routed to a driver output stage.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: July 3, 2012
    Assignee: Intel Mobile Communications GmbH
    Inventor: Stefan van Waasen
  • Patent number: 8212409
    Abstract: A method of activating a Multi-String inverter for photovoltaic generators (1a, 1b) of a photovoltaic plant (6), the Multi-String inverter incorporating on the input side a separate DC-DC converter (2a, 2b) for each generator string (photovoltaic generator) (1a, 1b) and each output of the DC-DC converters (2a, 2b) being connected in parallel and to an input of a DC-AC converter (3) and the DC-AC converter (3) being connected with an alternating current mains (4) for feeding into the mains aims at improving efficiency. This is achieved in that one or several electrical variables, namely input current, input voltage and/or input power are measured at each DC-DC converter (2a, 2b) and at least one of the DC-DC converters (2a, 2b) changing its operating condition as a function of this measurement when a limit value and/or a range is exceeded in such a manner that its power loss is reduced so that the energy yield of the photovoltaic plant (6) is increased.
    Type: Grant
    Filed: February 9, 2009
    Date of Patent: July 3, 2012
    Assignee: SMA Solar Technology AG
    Inventors: Gerd Bettenwort, Ralf Juchem, Matthias Victor, Tobias Müller
  • Patent number: 8209523
    Abstract: A data moving processor includes a code memory coupled to a code fetch circuit and a decode circuit coupled to the code fetch circuit. An address stack is coupled to the decode circuit and configured to store address data. A general purpose stack is coupled to the decode circuit and configured to store other data. The data moving processor uses data from the general purpose stack to perform calculations. The data moving processor uses address data from the address stack to identify source and destination memory locations. The address data may be used to drive an address line of a memory during a read or write operation. The address stack and general purpose stack are separately controlled using bytecode.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: June 26, 2012
    Assignee: Intel Mobile Communications GmbH
    Inventors: Ulf Nordqvist, Jinan Lin, Xiaoning Nie, Stefan Maier, Siegmar Koeppe