Abstract: A thin-film transistor array panel and a manufacturing method thereof are provided for one or more embodiments. The thin-film transistor array panel may include: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a source electrode and a drain electrode formed on the gate insulating layer; and a flatness layer formed on the source electrode and the drain electrode, wherein the drain electrode has a higher height than the flatness layer.

Abstract: Predicting the probability of detection of major and minor defects in a structure includes simulating a plurality of N defects at random locations in a region specified by an array of transducers. Defect size is incremented until it intersects one path between two transducers. The defect size is again incremented until it intersects two or more adjacent paths between pairs of transducers. The number of major defects up to a selected size is determined by the total number of single path intersections by defects up to the selected size. The number of minor defects up to a selected size is determined on the basis of the total number of defects intersecting two or more paths up to the selected size. The probability of detection up to a selected size is the cumulative number of major or minor defects up to the selected size normalizing by N.

Abstract: One or more embodiments of the present invention relate to a four color image display device. A display device according to an exemplary embodiment of the present invention includes a first pixel adapted to display a first color, a second pixel adapted to display a second color, a third pixel adapted to display a third color, and a white pixel adapted to display a first white. In one aspect, the first to third pixels are adapted to display a second white in combination, and a ratio of the first white and the second white varies according to a gray. Accordingly, a greenish phenomenon of a low-luminance white light in a four color display device may be reduced.

Abstract: A liquid crystal display includes: a substrate; a display region on the substrate, the display region comprising: one or more gate lines overlying the substrate; a gate insulating layer overlying the gate lines; a semiconductor layer overlying the gate insulating layer; one or more pairs of source and drain electrodes overlying the semiconductor layer, each pair being a pair of one source electrode and one corresponding drain electrode facing the source electrode; one or more data lines overlying the semiconductor layer, each data line comprising one or more of the source electrodes, wherein a display area is provided at each intersection of the data lines with the gate lines; a passivation layer overlying the data lines and the drain electrodes and comprising a plurality of contact holes; and one or more color filters overlying the passivation layer and comprising a plurality of through holes.

Abstract: A gate driving circuit and a display device having the same, a pull-up unit pulls up a current gate signal by using a first clock signal during a first period of one frame. A pull-up driver coupled to the pull-up unit receives a carry signal from one of the previous stages to turn on the pull-up unit. A pull-up unit receives a gate signal from one of the next stages, discharges the current gate signal to an off voltage level, and turns off the pull-up unit. A holder holds the current gate signal at the voltage level. An inverter turns on/off the holder in response to a first clock signal. A ripple preventer has a source and a gate coupled in common to an output terminal of the pull-up unit and a drain coupled to an input terminal of the inverter, and includes a ripple preventing diode for preventing a ripple from being applied to the inverter.

Abstract: An organic light emitting device according to one or more embodiments includes a gate line, a data line intersecting the gate line, a switching thin film transistor connected to the gate line and the data line, a driving thin film transistor connected to the switching thin film transistor, and a light emitting diode (LED) connected to the driving thin film transistor. The switching thin film transistor includes a control electrode connected to the gate line, a crystalline semiconductor overlapping the control electrode, and an input electrode and an output electrode are spaced apart from each other on the crystalline semiconductor, wherein the control electrode and the gate line are respectively disposed under and on the crystalline semiconductor and include different materials.

Abstract: Disclosed are a display and a method of driving the display. The display includes a display panel on which a plurality of data lines are formed, a data driver for supplying data voltages generated by modulating input image data to the respective data lines. The data driver includes a precharging unit for selecting a specific precharge voltage from a plurality of precharge voltages applied to the data driver depending on grayscale sections of the input image data, and for precharging the selected precharge voltages to the respective data lines. A predetermined voltage is precharged according to a grayscale section of image data and then applied to a pixel, whereby voltage rising time and voltage falling time when charging the pixel can be shortened. Therefore, even though the charge time of the pixel is shortened and bias current of the data driver is thus reduced, it is possible to obtain high driving performance.

Abstract: A thin film transistor array panel is provided, which includes a gate line, a data line intersecting the gate line, a storage electrode apart from the gate and data lines, a thin film transistor connected to the gate and data lines and having a drain electrode, a pixel electrode connected to the drain electrode, a first insulating layer over the thin film transistor and disposed under the pixel electrode, and a second insulating layer disposed on the first insulating layer and having an opening exposing the first insulating layer on the storage electrode.

Abstract: A thin film transistor array panel includes a substrate, a plurality of first and second signal lines crossing each other on the substrate, source electrodes connected to the first signal lines, drain electrodes connected to the second signal lines, pixel electrodes connected to the drain electrodes, a first partition formed on the source and drain electrodes and having a first opening, wherein a lower width of the first opening is wider than an upper width of the first opening, an organic semiconductor formed in the first opening and at least overlapping the portions of the source electrode and the drain electrode, and a gate electrode connected to the second signal line and at least overlapping the portion of the organic semiconductor.

Abstract: A backlight assembly includes a plurality of point light sources, a light guide plate (“LGP”) and a printed circuit board (“PCB”). The LGP has a light incident face in which light is incident, a side surface extending from an edge portion of the light incident face, and a fixing groove which is formed from the side surface toward an inner portion thereof. The PCB includes a point light source disposing portion in which the point light sources are disposed along a first direction, an extending portion extending from the point light disposing portion along a second direction substantially perpendicular to the first direction, and a protrusion which is fixed at an end portion of the extending portion. The protrusion of the PCB is coupled with the fixing groove of the LGP.

Abstract: A liquid crystal display with improved viewing angle and uncompromised transmittance is provided, along with a thin film transistor (TFT) array panel usable for such liquid crystal display. The TFT array panel includes a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines formed on the substrate and intersecting the gate lines, and a plurality of thin film transistors. Each of the thin film transistors includes a gate electrode connected to one of the gate lines, a source electrode connected to one of the data lines, and a drain electrode. The TFT array panel also includes a plurality of pixel electrodes, each of the pixel electrodes connected to one of the drain electrodes and having a pair of oblique edges parallel to each other, and covering at least a portion of the drain electrodes.

Abstract: A backlight assembly includes a plurality of lamps, a multi-plate diffusion member, optical sheets and a receiving container. The lamps have a rod shape extended in a first direction, and are arranged along a second direction that is substantially perpendicular to the first direction. The diffusion member is disposed above the lamps and has at least two optical plates. Each of the optical plates includes a plurality of optical patterns on a surface facing away from the lamps. The optical patterns are extended in the first direction and aligned along the second direction. The optical sheets are disposed above the diffusion member to improve optical characteristics of passed through light. The receiving container includes a reflective bottom plate and a sidewall formed on an edge of the bottom plate to receive the lamps, the diffusion member and the optical sheets.

Abstract: According to an embodiment of the present invention, a thin film transistor array panel includes a gate line and a data line insulated from each other on an insulating substrate where the gate line and the data line cross each other to define a pixel region, a thin film transistor (TFT) disposed at an intersection of the gate line and the data line, a floating electrode where at least a portion of the floating electrode overlaps the data line, and a pixel electrode disposed at the pixel region where the pixel electrode is connected to the TFT and overlaps the at least a portion of the floating electrode.

Abstract: A display device according to an embodiment of the present invention includes: a display panel; a plurality of pixels disposed on the display panel; a plurality of sensor data lines disposed on the display panel and disposed between two adjacent pixels; and a plurality of sensing units disposed on the display panel and disposed between two adjacent pixels.

Abstract: A method for determining optimal locations of a plurality of sensors for damage detection in a structural health monitoring system includes providing a one or more signal performance characteristics, spatial parameters describing a layout of a structure, and generating a layout for the plurality of sensors according to the signal performance characteristics and the spatial parameters. An estimated largest critical damage size that may not be detected by sensors arranged according to the first layout is determined. The layout is edited so as to reduce the estimated largest critical damage size to be less than or equal to a selected maximum size requirement.

Abstract: A three mask process for forming an LCD substrate includes, depositing in sequence on a base substrate a gate metallic layer, a gate insulation layer and a channel layer. A first photoresist pattern is used to form a gate electrode of a switching device, a channel pattern and a gate line on the gate electrode. A transparent conductive layer and a source metallic layer are deposited in sequence on the base substrate having the channel pattern. A source electrode and a drain electrode of the switching device, a pixel electrode and a source line electronically connected to the drain electrode, are formed by a second photoresist pattern. A first protective insulation layer is formed, and the first protective insulation layer on the pixel electrode is removed by a third photoresist pattern. Therefore, by the three masks process yields a simplified manufacturing process in which the lower portion of the source metallic pattern is not formed and display quality is improved.

Abstract: Novel three-color and four-color subpixel arrangements and architectures for display and the like are herein disclosed. Novel techniques for subpixel rendering on the above subpixel arrangements are also herein disclosed.

Abstract: A method for manufacturing a thin film transistor array panel is disclosed. A gate wiring pattern is formed on an insulating substrate. A gate insulating layer is formed on the gate wiring pattern. A semiconductor pattern is formed on the gate insulating layer. A transparent conductive layer is formed on the gate insulating layer. The transparent conductive layer is patterned to form a pixel electrode. An opening is formed at a circumference of the pixel electrode. The opening minimizes misalignment during the manufacturing process and prevents shorts between a data line and the pixel electrode.

Abstract: Local contrasts within segments of an image are maintained even as the image is gamut mapped to a new gamut space where the remapping, if done straight forward, may result in loss of local contrasts. Display systems described herein use a selective compression unit that first surveys segments of the image to determine which might lose local contrast due to gamut mapping and gamut clamping. Selective compression amounts are determined for respective segments so as to substantially maintain local contrast of the image data within the respective segments.

Abstract: A thin film transistor substrate includes a color filter layer and a gate line. The color filter layer has a reverse taper shape, which is used to pattern the gate line without a separate mask. Thus, the total number of masks used to manufacture the thin film transistor substrate can be reduced, thereby reducing the manufacturing cost and improving the productivity.