Abstract: A demultiplexer is provided within a liquid crystal display (LCD) to transfer respective data levels of a time multiplexed data signal to respective sub-pixels within a pixel group. The last of sequentially activated switches in the demultiplexer is activated for the longest time so as to provide sufficient time for charge to transfer from the demultiplexer to a subsidiary data line (SDL) of the last supplied sub-pixel and from that last SDL through a respective TFT of the last sub-pixel to the last supplied sub-pixel.

Abstract: A TFT array is disclosed that includes a substrate, a gate line formed on the substrate, the gate line extending in a first direction; a data line insulated from the gate line, the data line extending in a second direction different from the first direction and crossing the gate line; and a pixel, positioned adjacent an intersection of the gate line and the data line, wherein the pixel comprises a first pixel electrode portion comprising a plurality of spaced apart first electrode lines, the first pixel electrode portion having an associated TFT coupled to the first electrode portion, a second pixel electrode portion comprising a plurality of spaced apart second electrode lines, the second pixel electrode portion capacitively coupled with the first pixel electrode portion, wherein a width of each of the first electrode lines of the first pixel electrode portion is narrower than a width of each of the second electrode lines of the second pixel electrode portion, and an interval between adjacent first electrode

Abstract: In a first embodiment, a display system comprises a display panel with 4 or more colored subpixels. The display system receives input image data specified in a first color space and outputs image data specified in a second color space. The display system further comprises a gamut mapping module for mapping the input image data specified in the first color space to image data specified in the second color space. The gamut mapping module clamps out-of-gamut colors using at least a first clamping system and a second clamping system. The first and second clamping systems yield first and second clamped values. A weighting module produces a resulting clamped value from the first and second clamped values. A final output image value is derived from the resulting clamped value. Other embodiments of the display system include pre-reduction modules and adjustable GMA modules.

Abstract: An array substrate and a liquid crystal display (LCD) device having the array substrate are provided in one or more embodiments. For example, the array substrate may include a pixel electrode, a coupling electrode and an opposite electrode. The pixel electrode may include a first sub-electrode having a plurality of first electrode bars receiving a first voltage and a second sub-electrode having a plurality of second electrode bars. The plurality of first electrode bars and the plurality of second electrode bars may be spaced apart from each other. The coupling electrode may be electrically connected to a portion of the plurality of first electrode bars, may have a plurality of opposite electrode bars and may overlap a portion of the plurality of second electrode bars to form coupling capacitor. The opposite electrode may be disposed between the plurality of first electrode bars and the plurality of second electrode bars to receive a second voltage different from the first voltage.

Abstract: A thin film transistor is provided, which includes: a gate electrode (124); a gate insulating layer (140) formed on the gate electrode; a semiconductor layer (154) formed on the gate insulating layer and disposed opposite the gate electrode; a source electrode (173) and a drain electrode (175) that are formed at least in part on the semiconductor layer and face each other, a passivation layer (180) formed on the source electrode, the drain electrode, and a portion of the semiconductor layer that is not covered with the source electrode and the drain electrode; and a shielding electrode (196) formed on the passivation layer and disposed on a region between the source electrode and the drain electrode.

Abstract: In one embodiment of the display system, the display system comprises an image pipeline that accepts input color image data of one color gamut to be rendered on a display having high brightness subpixel layouts. In one embodiment, the system comprises a boost function that maps the input color data onto another color gamut that boosts the luminance of colors that might appear dark if rendered against a white or very light background.

Abstract: A display substrate includes a first pixel electrode and a second pixel electrode. The first pixel electrode includes a plurality of first electrode bars. A data line provides a data voltage to the first pixel electrode. The second pixel electrode includes a plurality of second electrode bars alternately disposed with the first electrode bars. A first power line is formed adjacent to a gate line to provide a first voltage to the second pixel electrode. A second power line crosses the first power line and is electrically connected to the first power line. A first switching element is electrically connected to the data line, the gate line and the first pixel electrode. A second switching element is electrically connected to the first power line, the gate line and the second pixel electrode.

Abstract: A method of fabricating a thin film transistor substrate and a negative photoresist composition used therein are provided, which can reduce pattern inferiority. The method of fabricating a thin film transistor substrate includes forming a conductive film composed of a conductive material on a substrate, forming an etch pattern composed of a negative photoresist composition on the conductive film, and forming a conductive pattern by etching the conductive film using the etch pattern as an etching mask, wherein the negative photoresist composition includes 10-50 parts by weight of novolak resin including a hydroxyl group that is soluble in an alkali developing solution, 0.5-10 parts by weight of a first photo acid generator represented by the following formula (1), 0.

Abstract: According to an embodiment of the present invention, a manufacturing method of a display device includes forming a plurality of gate wires comprising a gate electrode on an insulating substrate, forming an electrode layer comprising a source electrode and a drain electrode spaced apart from each other to define a channel region on the gate electrode interposed therebetween, forming a first barrier wall having a first opening for exposing the channel region, a portion of the source electrode, and a portion of the drain electrode on the electrode layer where the first barrier wall has a surface, forming a shielding film to cover the channel region inside the first opening, treating the surface of the first barrier wall, removing the shielding film, and forming an organic semiconductor layer inside the first opening.

Abstract: A display device including the thin film transistor, and a method of manufacturing the display device are provided. The thin film transistor comprising a first gate electrode, a second gate electrode formed on the first gate electrode, a first semiconductor formed on the first gate electrode and including a polycrystalline semiconductor, a second semiconductor formed on the second gate electrode and including an amorphous semiconductor.

Abstract: A thin-film transistor (TFT) substrate includes a gate electrode, a gate insulation pattern, a channel pattern, a first organic insulation pattern, a source electrode and a drain electrode. The gate electrode is formed on a base substrate. The gate insulation pattern is formed on the gate electrode and is smaller than the gate electrode. The channel pattern is formed on the gate insulation pattern and the channel pattern is smaller than the gate electrode. The first organic insulation pattern is formed on the base substrate to cover the channel pattern, the gate insulation pattern and the gate electrode.

Abstract: A liquid crystal display includes a plurality of subpixels respectively having switching elements and arranged in a matrix, a plurality of gate lines connected to the subpixels via the switching elements and transmitting a gate signal for turning on or off the switching elements, and a plurality of data lines connected to the subpixels via the switching elements and transmitting a data voltage. The respective subpixels are located in areas defined by two adjacent gate lines and two adjacent data lines, which are uniquely connected to a pair of gate line and data line, and at least one of the subpixels is connected to the different gate lines or the data line positioned at opposite side with respect to the other subpixel of the same row. In this case, a pair of subpixels adjacent above and below are connected to the gate line therebetween or the gate lines positioned at opposite side each other. In this way, any inversions for each color can be performed without changing conventional driving ICs.

Abstract: A display substrate in accordance with one or more embodiments includes a first line pattern, a first insulation layer, a second line pattern, a color filter layer and a pixel electrode, which are formed on a substrate. The first line pattern includes a gate line and a light-blocking layer. The light-blocking layer has a first opening portion formed in a storage capacitor region. The first insulation layer is formed on the substrate having the first line pattern. The second line pattern is formed on the first insulation layer. The color filter layer is formed on the substrate having the second line pattern, and has a second opening portion overlapping with the storage electrode. The pixel electrode is formed on the substrate having the color filter layer. Thus, short circuits between the storage electrode and the pixel electrode may be prevented.

Abstract: A photonic sensor includes a first electrode layer, a second electrode layer, a third electrode layer, a first photon absorption layer, a second photon absorption layer, a third photon absorption layer and a charge blocking layer. The first photon absorption layer includes a dispersion of first nanoparticles, and is configured to transduce a first colored light into corresponding electric charge. The second photon absorption layer includes a dispersion of second nanoparticles, and is configured to transduce a second colored light into corresponding electric charge according to light intensity. The third photon absorption layer includes a dispersion of third nanoparticles, and is configured to transduce a third colored light into corresponding electric charge according to light intensity. The charge blocking layer is formed between the first and second photon absorption layers to block flow of electric charge between the first and second photon absorption layers.

Abstract: Provided are a lamp socket structured to realize a slimmer display device, and a display device having the lamp socket. The lamp socket includes: a body portion; a connection terminal for connection of the lamp socket to a terminal of a lamp; a compliant portion which connects the body portion and the connection terminal and includes a first portion connected to the connection terminal and a second portion connected to the body portion; and one or more fixing portions which extend from the body portion, wherein the first portion and the second portion at least partially overlap each other.

Abstract: Embodiments of the present disclosure provide a liquid crystal display device having a liquid crystal display panel for displaying images, a lower receiving member for receiving the liquid crystal display panel, and a source PCB disposed on a side of the lower receiving member to supply a driving signal to the liquid crystal display panel. The liquid crystal display device includes a shield case arranged on rear surface of the lower receiving member. The shield case includes a body that protects a driving board, a fixing portion that fixes the source PCB to the lower receiving member, and a connection portion that connects the body to the fixing portion. The connection portion extends from an edge of the shield case. The liquid crystal display device includes an upper receiving member that combines with the lower receiving member to cover the liquid crystal display panel.

Abstract: The present invention provides an organic thin film transistor substrate and a method of manufacturing the same capable of uniformly forming the thickness of a gate insulating layer and a protective layer and preventing overflow of an organic semiconductive layer.

Abstract: A thin film transistor substrate with good process efficiency and a method of manufacturing the same are provided. The thin film transistor substrate includes a first conductive type MOS transistor and a second conductive type MOS transistor. The first conductive type MOS transistor includes a first semiconductor layer formed on a blocking layer and having first conductive type low-concentration doping regions adjacent to both sides of a channel region, first conductive type source/drain regions adjacent to the first conductive type low-concentration doping regions, a first gate insulating layer formed on the first semiconductor layer, a second gate insulating layer formed on the first gate insulating layer and overlapping with the channel region and the low-concentration doping regions of the first semiconductor layer, and a first gate electrode formed on the second gate insulating layer.

Abstract: A manufacturing method for a thin film transistor array panel including forming a gate electrode, forming an insulating layer on the gate electrode, sequentially forming a lower conducting layer and a upper conducting layer on the insulating layer, etching the upper conducting layer to form a first source electrode and a first drain electrode, etching the lower conducting layer to form the second source electrode and the second drain electrode, over-etching the second source electrode and the second drain electrode, and forming an organic semiconductor between the second source electrode and the second drain electrode.

Abstract: The present invention provides a thin film transistor array panel comprising: an insulating substrate; a gate line formed on the insulating substrate and having a gate electrode; a gate insulating layer formed on the gate line; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; diffusion barriers formed on the semiconductor and containing nitrogen; a data line crossing the gate line and having a source electrode partially contacting the diffusion barriers; a drain electrode partially contacting the diffusion barriers and facing the source electrode on the gate electrode; and a pixel electrode electrically connected to the drain electrode.