Abstract: A monolithic AM transmitter is disclosed. An external antenna forms part of a resonance network so that the antenna resonance point is automatically tuned to the transmit frequency. This provides flexibility with no added cost to the transmitter. Additionally, components of the transmitter can be formed on a single monolithic integrated circuit.

Abstract: A method for fabricating LGA-, LCCY- and BGA-types of very thin, chip size semi-conductor packages (“VCSP's”) includes substantially reducing the thickness of a semiconductor wafer containing the semiconductor chips to be packaged by grinding and/or etching the wafer from its back side prior to singulation of the chips from the wafer. The thinned-down chips thus produced are electrically connected to corresponding insulative substrates contained in an integral array thereof using the “flip chip” interconnection method. The narrow row space between the chips and the substrates are sealed with an underfill material, and the individual, finished VCSP's are then singulated from the array.

Abstract: This invention provides a method for making a semiconductor package with stacked dies that eliminates fracturing of the upper die(s) during the wire bonding process. One embodiment of the method includes the provision of a substrate and pair of semiconductor dies, each having opposite top and bottom surfaces and a plurality of wire bonding pads around the peripheries of their respective top surfaces. One die is attached and wire bonded to a top surface of the substrate. A measured quantity of an uncured, fluid adhesive is dispensed onto the top surface of the first die, and the adhesive is squeezed toward the edges of the dies by pressing the bottom surface of the second die down onto the adhesive until the two dies are separated by a layer of the adhesive. The adhesive is cured, the second die is then wire bonded to the substrate, and the dies are then molded over with an encapsulant.

Abstract: Systems and methods are disclosed for localized electrostatic discharge protection of integrated circuit input/output pads. The localized clamp is isolated from the main supply voltage clamp and coupled to the input/output pad through low-capacitance diodes.

Abstract: A semiconductor package including plural semiconductor chips, and a wire bonding step for electrically interconnecting the semiconductor chips, are disclosed. In an exemplary method, a substrate is provided. Conductive circuit patterns are provided outside of a chip mounting region of the substrate, and conductive transfer patterns are provided proximate to the chip mounting region. Chips are placed in the chip mounting region. Conductive wires are bonded between input/output pads of a first chip and respective transfer patterns, and other conductive wires are bonded between input/output pads of a second chip and the same transfer patterns, thereby electrically connecting respective input/output pads of the two chips through a pair of bond wires and an intermediate transfer pattern.

Abstract: A sealed ceramic package for a semiconductor device and a method of fabricating the same are disclosed. In one embodiment, a ceramic substrate has a set of cavities each having an opening at a substrate top surface. A semiconductor die is disposed within each cavity, and is electrically connected through the substrate to input/output terminals of the substrate. The substrate has a metal film on the top surface thereof around the opening of the respective the cavities. A metal lid panel, covering the cavity openings, is soldered to the metal film by reflowing a layer of solder disposed over a lid panel bottom surface, thereby sealing the die in each cavity. Subsequently, individual packages are singulated from the ceramic substrate.

Abstract: Alternative methods for making memory cards for computers and such eliminate a need for a separate external housing and a separate chip encapsulation step and enable more memory to be packaged in a same-sized card. One of said methods includes providing a substrate having opposite first and second surfaces with a memory chip mounted on and in electrical connection with a first surface of said substrate. Said second surface of said substrate is temporarily attached to a first surface of a flat carrier sheet, e.g., an adhesive tape. In one embodiment, a mold having a cavity therein is placed on said first surface of said carrier sheet such that said chip and said first surface of said substrate are enclosed in said cavity between said mold and said carrier sheet. A fluid plastic is introduced into said cavity and cured to encapsulate said chip and at least said first surface of said substrate in a protective, monolithic body of hardened plastic. A completed card is then detached from said carrier sheet.

Abstract: A semiconductor chip package includes a plurality of leadframe portions and a semiconductor die mounted on at least one of the leadframe portions. A shield element is attached to at least one of the leadframe portions. A package mold surrounds the semiconductor die and the shield element. Radiation shielding is thereby provided in a practical manner for a leadframe-based semiconductor chip package.

Abstract: A method of packaging a device is disclosed. In one embodiment, a substrate including a common voltage plane and a mounting region is provided, with the device mounted to the mounting region. An electrically conductive dam structure is disposed on the surface of the substrate with the electrically conductive dam structure being electrically coupled to the common voltage plane and circumscribing a perimeter of the mounting region. An electrically insulating encapsulant at least partially fills a pocket defined by the substrate and the electrically conductive dam structure, the electrically insulating encapsulant contacting the electrically conductive dam structure. An electrically conductive encapsulant is provided that overlies the electrically insulating encapsulant, the electrically conductive encapsulant being coupled to the electrically conductive dam structure.

Abstract: In a leadframe type of semiconductor package, the internal electrical interconnectability of and signal routing between multiple dies laminated in a stack with the die paddle of the leadframe is substantially enhanced by laminating an “interposer” in the stack. The interposer comprises a dielectric layer and a metallic layer patterned to include wire bonding pads arrayed around the periphery of a surface thereof, and circuit traces interconnecting selected ones of the wire bonding pads in a single plane across the horizontal span of the interposer. In packages having multiple dies and relatively few leads, the bonding pads and circuit traces can be flexibly arranged on the interposer by the package designer to substantially increase the number and routings of internal electrical interconnections otherwise possible between the dies and between the dies and the leads of the package.

Abstract: A simple, inexpensive method and apparatus are provided for increasing the thickness of a body molded on a semiconductor package without the need for a new mold, or for reworking the parts of an existing mold. The method includes providing a mold having parts that engage each other at respective interfacial surfaces, and a shim having a selected thickness and an opening through an interior portion thereof. The shim is interposed between the interfacial surfaces of the mold parts such that the mold parts are spaced apart by the thickness of the shim, and such that the mold parts and the shim opening define a cavity in the mold. The length and width of the cavity of the mold thus remain the same, while the height of the cavity, and hence, the thickness of the molded body, is increased by the thickness of the shim.

Abstract: A three-dimensional density distribution of a log is reduced to a two-dimensional structure that provides a convenient image or visualization of defects like knots or voids in a log, to facilitate grading and/or optimization of a sawing strategy for the log. The two-dimensional data structure is based on cylindrical or modified cylindrical coordinates Z and &thgr;. To provide a more compact identification of defects, modified cylindrical coordinates use a Z-axis that follows the growth center in the log and determines data points by evaluating properties of the log along rays at an upward angle corresponding to limbs in a tree. A process for identifying the growth center at any distance Z along the length of the log examines or accumulates the gradient of density along lines through a cross-section of the log. Manual grading and sawing optimization can employ viewing of an image based on the two-dimensional data structure with superimposed marks indicating the boundaries of faces cut from the log.

Abstract: A novel operational amplifier is disclosed which is divided into an input stage, a common mode feedback stage and an output stage. The output of the operational amplifier swings rail to rail, and the input may swing nearly rail to rail. The operational amplifier combines fast response with low power consumption and low supply voltage.

Abstract: Methods for forming packages for housing an integrated circuit device are disclosed. In one embodiment, a plastic sheet having an first surface is provided. An array of package sites is formed on the first surface of the plastic sheet. The package sites each include a metal die pad and leads surrounding the die pad. The package sites may be formed by applying a first metal layer on the first surface of the plastic sheet, and then applying a second metal layer in a pattern that defines the die pads and leads of the package sites. The first metal layer is then selectively etched using the second metal layer as an etch mask. Next, an integrated circuit die is placed on each die pad of the array. The die is electrically connected to the leads surrounding the respective die pad. An encapsulant is applied onto the first surface of the plastic sheets so as to cover the package sites.

Abstract: Disclosed is a matrix type printed circuit board (PCB) for semiconductor packages having a structure including a plurality of PCB units arranged in a matrix array having at least two rows in such a fashion that the mold runner gates of adjacent PCB units respectively arranged in adjacent rows while being arranged in the same column communicate with each other by an integrate mold runner, thereby being capable of allowing an increased number of PCB units to be simultaneously processed in each process involved in the fabrication of semiconductor packages, so that a great improvement in productivity is achieved. In particular, it is possible to allow an increased number of PCB units to be simultaneously molded in a resin encapsulate molding process, thereby achieving a great improvement in the efficiency of the resin encapsulate molding process.

Abstract: Semiconductor packages including at least one semiconductor chip and at least one electronic discrete device, such as a transistor, oscillator, optical sensor, resistor, capacitor, or inductor, are disclosed. The semiconductor chip and the discrete device are electrically coupled to each other, and are encapsulated within a protective encapsulant material. The semiconductor chip and the discrete device are disposed either in an aperture through the substrate or in a pocket of the substrate, thereby allowing for a thin package, even where the discrete device is taller (e.g., 1.5 to 5 times taller) than the semiconductor chip and/or substrate.

Abstract: Chip-size semiconductor packages (“CSPs”) containing multiple stacked dies are disclosed. The dies are mounted on one another in a stack such that corresponding ones of the vias in the respective dies are coaxially aligned. An electrically conductive wire or pin is in each set of aligned vias and soldered to corresponding ones of the terminal pads. The pins include portions protruding from the stack of dies that serve as input-output terminals of the package. Heat spreaders can be interleaved between the stacked dies to enhance heat dissipation from the package.

Abstract: A semiconductor device includes include a package allowing for increased thermal dissipation. The device includes a power MOSFET die that is electrically connected to a portion of the substrate with a metal strap. The die and at least portions of the strap and substrate are encapsulated in an insulative encapsulant, such as molded plastic. A top surface of the strap is exposed to the environment through the encapsulant. The exposed surface may have grooves formed therein, or fins formed thereon, to facilitate heat transfer.

Abstract: A method and apparatus for protecting hypersensitive microcircuits on the face of a semiconductor wafer from contamination and mechanical damage during die sawing and subsequent die handling operations include the provision of a plastic sheet having an array of protective domes formed into it, the array corresponding to the array of microcircuits on the wafer, and the temporary adhesion of the sheet to the face of the wafer such that each die in the wafer is covered by a respective one of the domes, with an associated one of the microcircuits protectively sealed therein. Die sawing is performed with the component side of the wafer facing up, the cut passing between the domes and through the thicknesses of both the domed sheet and the wafer such that each die is separated from the wafer, with a corresponding one of the domes still attached to it. The domes may be removed later when the dies are located in a more benign environment by simply peeling them off the die.

Abstract: A method and apparatus for scheduling the distribution of information so as to maximize the viewer ship of the same and, therefore, profits. Dynamic scheduling of distribution of subportions of the information, referred to as descriptors that typically correspond to a motion picture program, is achieved so that the subportions may be transmitted to end users having a high probability of perceiving the same. A subgroup of the descriptors have a weighting value assigned thereto with said subgroup of said plurality of descriptors having a weighting value differing from the weighting value associated with the remaining descriptors of said subgroup. The weighting value is a function of predetermined parameters associated with said motion picture program, such as revenue generated when released in movie theaters, comments by professional critics and contractual constraints placed upon the distributor by holders of the ownership rights of the motion picture program.