Abstract: A capacitor and a method of forming the same, one embodiment of which includes depositing a multi-layer dielectric film between first and second spaced-apart electrodes. The multi-layer dielectric film includes first and second layers that have differing roughness. The layer of the dielectric film having the least amount of roughness is disposed adjacent to the first electrode. After depositing the second layer of the dielectric film adjacent to the first layer, the second layer is annealed. An exemplary embodiment of the thin film capacitor forms the dielectric material from silicon dioxide (SiO2) and tantalum pentoxide (Ta2O5).
Abstract: A miniature projector to allow the projection of images directly on a target surface, such as a viewer's retina, which is a compact and versatile device that further minimizes the potential for total immersion. The miniature projector can be selected for use in the monitor mode or full video and full color or monochrome operation. The miniature projector utilizes miniaturized 2D laser arrays integrated with nonlinear optical processes combining semiconductor technology with optics technology.
Abstract: A theft resistant valve cap including a liner adapted for threaded engagement with a standard pneumatic tire stem valve, a sleeve rotatably mounted with the liner to shroud it and an interlocking feature to selectively prevent axial displacement between the liner and the sleeve. The liner includes a hollow body with first and second opposed ends that features shoulders positioned proximate to one of said opposed ends. The shoulders, when employed with the sleeve rotatably mounted with the liner to shroud it, facilitates restricting removal of the cap from the valve stem to authorized individuals, only. Specifically, an interlocking mechanism extends between the liner and the sleeve and limits axial movement therebetween, while allowing rotational movement. To remove the cap from the valve stem, a key is employed which forms an interference fit with the shoulders in the liner, once exposed.
Abstract: The present invention relates generally to methods, apparatuses and materials to reduce or minimize the heating of a substrate (and associated distortions of the photomask) caused by electron-beam energy deposited in the substrate during patterning. The present invention provides useful materials and methods for reducing such reflection or re-radiation effects, leading to temperature stability of the substrate, reduced thermal distortion and the possibility of increased patterning accuracy. The infrared absorbing materials of the present invention also possess sufficient electrical conductivity to dissipate scattered electrons residing on the material, and sufficient thermal conductivity to dissipate heat rapidly and not result in local heating or significant temperature rise of the absorber.
Abstract: Provided is an optical backplane interconnect system, one embodiment of which features transceiver subsystems employing holographic optical elements (HOEs) that define, and discriminate between, differing optical channels of communication. The HOEs employ a holograph transform to concurrently refract and filter optical energy to remove optical energy having unwanted characteristics. To that end, the transceiver subsystem is mounted to an expansion card and includes a source of optical energy and an optical detector. The HOE need not be mounted to the expansion card. In one embodiment, however, the HOE is mounted to the expansion card and in optical communication with either the source of optical energy, the optical detector or both.
Abstract: A system and method for efficiently interconnecting a plurality of ICs, thereby improving the electrical performance of the overall system while reducing contact degradation due to stress that results from differences in the coefficients of thermal expansion of the various components during thermal cycling
Type:
Grant
Filed:
July 31, 2000
Date of Patent:
August 20, 2002
Assignee:
Alpine Microsystems, Inc.
Inventors:
Martin P. Goetz, Sammy K. Brown, George E. Avery, Andrew K. Wiggin, Tom L. Todd, Sam Beal
Abstract: An electron beam writing system includes an electron beam patterning machine operable to emit an electron beam to form a pattern on a substrate. A computer control system, coupled to the electron beam patterning machine, has a plurality of pre-computed distortion maps. Each distortion map describes expected distortions of the substrate caused by bulk heating resulting from exposure to the electron beam. The computer control system controls the electron beam patterning machine using the distortion maps in order to adjust for the expected distortions.
Type:
Grant
Filed:
April 13, 1999
Date of Patent:
July 23, 2002
Assignee:
Applied Materials, Inc.
Inventors:
Francis C. Chilese, Bassam Shamoun, David Trost
Abstract: A weighing apparatus and a method that features a lifting assembly connected between a calibrated load, having a weight associated therewith, and a frame, to vary an amount of the weight placed on the frame. A load-bearing member is coupled to the frame, and a load sensing system connected to the frame. The load sensing system is connected to sense the variance in the weight of the frame or the load supported by the load-bearing member. The lifting assembly operates to move the calibrated load between first and second positions. In the first position, the calibrated load is positioned spaced-apart from the frame and rests upon a surface to prevent the frame from being subjected to the mass of the calibrated load. Optimally, when placed in the first position, the load sensing system detects no load on the load-bearing member and the frame. In the second position, the calibrated load is positioned proximate to the frame.
Abstract: A method for shaping an optical fiber with various geometries while minimizing unwanted artifacts in the core of the optical fiber. The method facilitates control of sag in the region of the core that is exposed to a beam of optical energy. The sag is reduced, if not eliminated, by maintaining the cross-sectional area of the core that is exposed to the beam at thermal equilibrium.
Abstract: A method and a system for wafer level burn-in testing of a circuit featuring a flip-jumper to permit selectively connecting signals to the interconnect sites on the wafer that are in constant electrical communication with the circuit.
Type:
Grant
Filed:
July 19, 1999
Date of Patent:
January 8, 2002
Assignee:
Alpine Microsystems, Inc.
Inventors:
Andrew K. Wiggin, Allan Calamoneri, Martin P. Goetz, John Zasio, George E. Avery, Sammy K. Brown