Abstract: A high-repetition rate switch for delivering short duration, high-power electrical pulses from a pulsed-charged dc power supply. The present invention utilizes a microwave-generating device such as a magnetron that is capable of producing high-power pulses at high-pulse repetition rates and fast-pulse risetimes for long periods with high reliability. The rail-gap electrodes provide a large surface area that reduces induction effects and minimizes electrode erosion. Additionally, breakdown is initiated in a continuous geometric fashion that also increases operating lifetime of the device.

Abstract: Inductive storage pulse circuit device which is capable of delivering a series of electrical pulses to a load in a sequential manner. Silicon controlled rectifiers as well as spark gap switches can be utilized in accordance with the present invention. A commutation switching array is utilized to produce a reverse current to turn-off the main opening switch. A commutation capacitor produces the reverse current and is initially charged to a predetermined voltage and subsequently charged in alternating directions by the inductive storage current.

Abstract: The disclosure is directed to a bidirectional slapper detonator. One embodiment utilizes a single bridge circuit to detonate a pair of opposing initiating pellets. A line generator embodiment uses a plurality of bridges in electrical series to generate opposing cylindrical wavefronts.

Abstract: A stepping motor is microprocessingly controlled by digital circuitry which monitors the output of a shaft encoder adjustably secured to the stepping motor and generates a subsequent stepping pulse only after the preceding step has occurred and a fixed delay has expired. The fixed delay is variable on a real-time basis to provide for smooth and controlled deceleration.

Abstract: The disclosure relates to refrigeration through magnetizing and demagnitizing a body by rotating it within a magnetic field. Internal and external heat exchange fluids and in one embodiment, a regenerator, are used.

Abstract: In a named-data hierarchical memory system wherein data is stored in pages at each memory level, a word valid bit to indicate the presence of data and a word modified bit is appended to each data word and associated detection and control apparatus is provided to permit the page oriented data to be stored and fetched on a word basis at each memory level. The detection and control logic functions to store only the data words in a page which contain actual data and to operate each level as a storage queue for the next lower level thereby eliminating the requirement and associated time delay of prefetching a page from the lower level before storage of any data words therein at the higher level.

Abstract: A capacitively coupled inductive shunt current sensor which utilizes capacitive coupling between flanges having an annular inductive channel formed therein. A voltage dividing capacitor is connected between the coupling capacitor and ground to provide immediate capacitive division of the output signal so as to provide a high frequency response of the current pulse to be detected. The present invention can be used in any desired outer conductor such as the outer conductor of a coaxial transmission line, the outer conductor of an electron beam transmission line, etc.

Abstract: A superconducting quantum interference device (SQUID) magnetic detection apparatus detects magnetic fields, signals, and anomalies at remote locations. Two remotely rotatable SQUID gradiometers may be housed in a cryogenic environment to search for and locate unambiguously magnetic anomalies. The SQUID magnetic detection apparatus can be used to determine the azimuth of a hydrofracture by first flooding the hydrofracture with a ferrofluid to create an artificial magnetic anomaly therein.

Abstract: In a named data processing system having a plurality of memory modules, each module therein having a plurality of locations for storing data pages and the like, a memory address translation apparatus and method translates a data job name and associated segmented address field into a memory module-page addressing pair wherein each and every storage location may be accessed by each and every job name. The job name and the associated segmented address field are each partitioned into most and least significant bit fields. Through translation a storage location is defined by the exclusive ORing of the least significant fields of the data job name and segmented address field. Likewise a memory module is defined by the exclusive ORing of the most significant fields of the job name and the segmented address field as permuted by an exclusive ORing with the least significant field of the segmented address field.

Abstract: The quadrature phase angle .phi.(t) of a pair of quadrature signals S.sub.1 (t) and S.sub.2 (t) is digitally encoded on a real time basis by a quadrature digitizer for fractional .phi.(t) rotational excursions and by a quadrature up/down counter for full .phi.(t) rotations. The pair of quadrature signals are of the form S.sub.1 (t)=k(t) sin .phi.(t) and S.sub.2 (t)=k(t) cos .phi.(t) where k(t) is a signal common to both. The quadrature digitizer and the quadrature up/down counter may be used together or singularly as desired or required. Optionally, a digital-to-analog converter may follow the outputs of the quadrature digitizer and the quadrature up/down counter to provide an analog signal output of the quadrature phase angle .phi.(t).

Abstract: A device for indicating and preventing damage to voltage cells such as galvanic cells and fuel cells connected in series by detecting sequential voltages and comparing these voltages to adjacent voltage cells. The device is implemented by using operational amplifiers and switching circuitry is provided by transistors. The device can be utilized in battery powered electric vehicles to prevent galvanic cell damage and also in series connected fuel cells to prevent fuel cell damage.

Abstract: A high speed parallel array data processing architecture fashioned under a computational envelope approach includes a data base memory for secondary storage of programs and data, and a plurality of memory modules interconnected to a plurality of processing modules by a connection network of the Omega gender. Programs and data are fed from the data base memory to the plurality of memory modules and from hence the programs are fed through the connection network to the array of processors (one copy of each program for each processor). Execution of the programs occur with the processors operating normally quite independently of each other in a multiprocessing fashion. For data dependent operations and other suitable operations, all processors are instructed to finish one given task or program branch before all are instructed to proceed in parallel processing fashion on the next instruction.

Abstract: In a parallel data processing system architecture capable of processing in parallel a plurality of data elements from a linear vector stored in a memory module array having in number a power-of-two memory modules, a high degree of conflict-free access to the stored linear vector data elements is achieved through skewed storage wherein a skewing occurs at every Mth address and a further skewing at every M.sup.2 address wherein M (a power-of-two) is equal to the number of memory modules. The data elements are fetched through a connection network for processing in a processor array having in number a power-of-two processors.

Abstract: A coaxial high voltage, high current switch having a solid cylindrical cold cathode coaxially surrounded by a thin hollow cylindrical inner electrode and a larger hollow cylindrical outer electrode. A high voltage trigger between the cathode and the inner electrode causes electrons to be emitted from the cathode and flow to the inner electrode preferably through a vacuum. Some of the electrons penetrate the inner electrode and cause a volumetric discharge in the gas (which may be merely air) between the inner and outer electrodes. The discharge provides a low impedance path between a high voltage charge placed on the outer electrode and a load (which may be a high power laser) coupled to the inner electrode. For high repetition rate the gas between the inner and outer electrodes may be continuously exchanged or refreshed under pressure.

Abstract: An N phase digital inverter for converting an input DC voltage level to an output DC voltage level interposes between the input and output terminals thereof a plurality of N parallel switching circuits, each switching circuit thereof comprising in series a power switch and a transformer. The output of each transformer is coupled through a diode to a common point for filtering to generate the output DC voltage. The output DC voltage is sensed and fed to a logic generator for generating a ring sequence of pulses which activate sequentially each power switch in the plurality thereof. The logic generator controls the ratio of pulse time ON divided by pulse time ON plus pulse time OFF to maintain a desired level of output DC voltage.

Abstract: A device is described for facilitating the application of an identifying label to a specific location on the surface of an integrated circuit package. In performing its function, the device permits an operator to lift a self-adhering label containing the desired indicia from its backing card while visually aligning it in the device. The operator then places one end of the integrated circuit package into the device, thereby effectively aligning the label with a desired location on the package surface so that it may be transferred thereto. The device finds particular application in an actual operative high density packaging system wherein the adjacent surfaces of a pair of integrated circuit packages are visible only through a narrow slot in a package hold-down member. Labels, such as those placed on generic PROM packages by operators immediately after programming, are thus precisely located so that their type designation can be seen through the aforementioned slot.

Abstract: A system is provided for arranging articles in a predetermined sequence. In mail handling applications, the documents destined for local distribution may be segregated as to the respective routes of the postmen and arranged in sequence within each route in accordance with the mail-stops or street addresses. In such a system, the documents are transported by individual mechanical carriers. Temporary high density storage of the documents is provided by a recirculation buffer subsystem. Based upon system priorities, selected carriers may be taken out of buffer storage, independently of the other carriers. The selected carriers are then circulated in a short transit-time loop from which they exit to one or more output racks, where they appear in sequential order.

Abstract: The present disclosure describes an isolator/switching assembly for use in a message terminal system. The assembly permits a pair of electronic data processors, one on-line and the other a back-up unit, each processing confidential or so called "red" data, to interface with each other and both units to interface with and control a common peripheral device or I/O port. At the same time, the assembly provides physical and electrical isolation between the processor and the peripheral device and insures the TEMPEST security of the entire system.

Abstract: The present disclosure describes an unwrap assembly for use on automatic wiring machines. Such machines are employed to make solderless wire-wrapped connections on posts or terminals emanating from the common plane surface of logic cards and the like. For various reasons, such as logic changes or faulty workmanship, the complete or partial removal of the wires wrapped by such machines may be required. The unwrap assembly of the present invention, comprised of a specially designed unwrap tool slidably disposed within a wire coil stripper sleeve and readily mounted between brackets on the wiring machine, performs the removal function in an economical, time-saving and efficient manner.

Abstract: In a microprogrammed data processing pipeline system comprising a plurality of stages, microinstructions for controlling the stages are stored as templates in an addressable template micromemory store and are provided automatically and sequentially to the stage of the pipeline system. Each template is associated with an individual set of data and includes microinstructions for each stage, whether real or virtual, through which the associated set of data passes. The template micromemory store is segmented into a plurality of individually addressable micromemory units with each unit therein storing microinstructions for an individually associated stage in the data processing pipeline system.