Abstract: In a high speed arithmetic apparatus, the tally coded output of a modular mask generator addressed by a binary first operand and the tally coded input of a priority encoder are joined together by an interconnecting apparatus. The interconnecting apparatus is responsive in form to a second operand and to a selected arithmetic operation to provide at the output of the priority encoder the binary resultant of the selected operation executed upon the first and second operands. The interconnecting apparatus is disclosed in its simplest embodiment as fixed hardwired connections and in its most sophisticated embodiment as a dynamically microprogrammable full crossbar network.

Abstract: In a data processing system having a plurality of storage units, each unit therein storing in integer or normalized floating point format, an exponent sign bit, an exponent field, an integer/fraction sign bit, and an integer/fraction field, a converter transforms the stored data into pure binary values of selectively the same or the inverse relative order. To convert into the same relative order, the exponent sign bit is complemented if the integer/fraction sign bit is a logical zero and the exponent is complemented if otherwise. Thereafter, the integer/fraction bit is complemented. To convert into the inverse relative order, the exponent sign bit is complemented if the integer/fraction sign bit is a logical one and the exponent field is complemented if otherwise. Also, the integer/fraction field is complemented.

Abstract: A loader which itself may be implemented in firmware, being permanently resident within a read-only microinstruction memory in a microprogrammable digital processor, or which may be implemented by a hardwired digital logic equivalent, is provided for binding the firmware structure of such microinstruction processor at user-program, load-time. This loader is preferably activated by the loading operation to read the loaded program's operating requirements and to equate these to system requirements and to firmware controller requirements. The loader may then call upon a library of firmware which may be optionally incorporated into the system, to select the specific firmware modules which are needed to execute that particular program, and to bind the selected firmware into the processor's microprogram read-write memory.

Abstract: An improved educational device comprises a hand held paddle-shaped device having a windowed front plate, a back plate, and rotatably interposed therebetween two circular disks, a first disk for displaying problem and solution indicia through the windowed front plate and a second disk for temporarily masking the display of the solution indicia. Tabs on the two disks permit both clockwise and counterclockwise rotation of the disks to a problem indicia displaying position. Subsequently, under the control of the operator of the improved educational device, the masking disk is rotated relative to the displaying disk, either manually as in one embodiment of the invention or automatically by a spring or other like means as in alternate embodiments to permit the display of both problem and solution indicia. As preferred, the display disk may be made easily interchangeable with other displaying disks having differing problem and solution indicia.

Abstract: Modulo M translation is performed on a large binary number of n bits by grouping the binary number in contiguous sets of approximately K bits each, storing the modulo M residues for each K bit set in an individually associated pre-stored ROM, reading the modulo M residues for a particular K bit segment of a binary number out of the ROMs, and performing modulo M addition on the read-out residues. Thus, modulo M translation of a positive number is accomplished in n/k modulo M additions and a table look-up, with the look-up table being stored in n/k ROMs. A subsequent modulo M subtraction is performed if the binary number is negative.

Abstract: An electrostatic dot matrix printer includes a print head utilizing a self-scanning ion charge transfer system to reduce the number of dot drivers and the operating potential required for electrostatic printing. In the print head, ionization is transferred from a set of scanning anodes to a set of apertured cathodes in a cyclical aperture-by-aperture fashion. In synchronism with the cylical transfer a selected pattern of ionization is transferred from the apertured cathodes, to a set of printing anodes. The selected pattern of ionization is further transferred to a portion of electrostatic paper by a planar electrode, thereby depositing a selectively determined charge pattern on the electrostatic paper.

Abstract: For a serial-bit, programmable microinstruction processor having serial-byte internal transfers, an expanded-memory addressing apparatus and method is provided by the incorporation into the processor system a plurality of external memory units and a selection and transfer circuitry for accessing external memory space from within the processor. The accessing of external memory locations may be controlled by programmed memory access command instructions. These instructions may be operated upon by decoding components and buffer storage components to make available, concurrently, the entire contents of a particular one of the external memory units. Once a particular memory, or page is selected, a location within that page may then be addressed by memory address registers within the base processor.

Abstract: An improved microinstruction memory addressing method and apparatus within a serial-bit microinstruction processor incorporating internal, serial-byte transfer, is provided by addition to and alteration of memory control circuitry wherein the resulting permissible microinstruction set for controlling the processor may be expanded to include a CALL, GO-TO and EXECUTE operations, thus increasing the programmatic capabilities in the processor. The micro-code needed to define more complicated program operations, and thus the time used to perform these operations, may therefore be greatly reduced. Changes may also be made in existing timing circuitry.

Abstract: A control for a resistance solder unit for maintaining solder probe temperature within an acceptable range is provided using a redundant interlocking switching circuit. A pair of dual, single pole, single throw, variable time delay electronic relays, and a pair of dual, single pole, single throw electrical relays may be interconnected into the supply line for the AC to DC soldering transformer to control the time and duration of current to a resistance soldering probe. Included may be an autotransformer-coupled feedback from the resistance solder ground return of the soldering probe. Typically, visual and audible signals provide probe power status.

Abstract: A FIFO (first-in-first-out) buffer register in which memory data words flow in parallel from an input register through a plurality of registers towards an output register under the automatic control of a one-shot (monostable multivibrator) data transfer system. A one-shot device and a status flip-flop are associated with each individual register in the plurality of registers to asynchronously transfer a data word register-by-register from the input register to the register nearest the output register that is not occupied by a previously inputted data word. The automatic data word transfer system is initiated by either reading a word into the input register or reading a word out of the output register. Logic controls for handling the reading-in and reading-out functions operate asynchronously and independently.