Abstract: A picture display apparatus for enlarging a portion of a picture displayed on a screen for display on the same screen. The picture display apparatus includes a display unit having a display screen on which a picture is displayed, a specifying unit for specifying an optional area of an overall picture displayed on a display screen of the display unit, a magnified picture generating unit for generating a magnified picture of the area specified by the specifying unit, and a display control unit for superimposing the magnified picture on the overall picture in such a manner that the magnified picture is superimposed on the overall picture and the portion of the overall picture overlapped below the magnified picture is rendered visible and displayed on the display screen of the display unit.
Abstract: Particles in a fluid are counted as the fluid flows through an examination area of a particle analyzer. Parameters based upon the particle count are calculated. It is determined whether the at least one calculated parameter is within an allowable range for the parameter. Based on this determination, an indication is provided of uniformity of the fluid sample in the examination area.
Type:
Grant
Filed:
May 7, 1997
Date of Patent:
February 6, 2001
Assignee:
International Remote Imaging Systems, Inc.
Abstract: The present invention provides a program creation apparatus for a software development system capable of deleting some of modules during an execution. A header file 30 and a source file 31 are compiled by a compiler 33 using a compile information 32 from a compile processing block 34 and the header file 30, so as to create an object file 35. Using a linker 38, a link information 37, and a library file 36, the object file 35 is linked in a link processing block 39 so as to become an execution-formatted file 40. A composite execution-formatted file information 41 provides an information about the execution-formatted file 40 to be contained in a composite execution-formatted file format file 43. According to this information, a composite execution-formatted file creation block 42 is supplied with an initialization program 78 and a plurality of execution-formatted files 40 and outputs the single composite execution-formatted file format file 43.
Abstract: A high-voltage sensing circuit is provided that inhibits or prevents a low-voltage from being inadvertently sensed as a high-voltage during power-up and power-down and triggering a high-voltage operation such as a chip erase. The high-voltage sensing circuit comprises a low-power supply sensing circuit for generating a control signal in response to the detection of a power supply level and a switch, controlled by the control signal, that receives the input voltage and passes an output voltage if the input voltage is greater than a reference voltage. Until the power supply exceeds a certain amount, a switching transistor will be OFF and VIN (the output of the charge pump) will not be high enough. Thus, a low-voltage is prevented from being inadvertently sensed by the high-voltage sensing circuit as a high-voltage and triggering a high-voltage operation such as a chip erase.
Abstract: A modular child's harness and knapsack is disclosed having a waist belt, two shoulder straps, and gear that attaches to the waist belt and shoulder straps. The lower ends of the shoulder straps are foldable so that they may be folded up for use by a smaller child, and later unfolded as the child grows taller.
Abstract: A system for producing an output scrambled digital data stream from an input scrambled digital data stream. The input scrambled digital data stream includes a plurality of control messages (ECMs), each ECM including coded information for generating a control word (CW) associated with the ECM and being encoded using an ECM key. The input scrambled digital data stream also includes a plurality of segments of scrambled digital data, each segment of scrambled digital data being associated with one of the plurality of ECMs and being scrambled using the CW associated with the ECM.
Abstract: A flash EPROM device (100) is disclosed. During a programming operation, a primary programming voltage circuit (116) drives I/O lines (110) to a programming voltage (Vp) according to input data values. Secondary programming voltage circuits (118) are located remotely from the primary programming voltage circuit (116) and further drive I/O lines to Vp in response to the voltage levels on the I/O lines. This arrangement reduces the effect on the load line response of the impedance intermediate the primary programming voltage circuit (116) and the secondary programming voltage circuits (118).
Abstract: Described herein is a chemical injection system and method utilizing a chemical storage vessel coupled to a bulk source of chemical and proportioned to contain a volume of chemical useful for multiple applications for which the chemical is to be utilized. A dispense vessel proportioned to contain a volume of chemical useful for a single application is fluidly coupled to the chemical storage vessel. A controller controls operation of a system of valves and sensors, which operate to fill the chemical storage vessel, and to precisely dispense the volume required for a single application from the storage vessel into the dispense vessel and then ultimately into the vessel in which the chemical is needed.
Type:
Grant
Filed:
January 8, 1999
Date of Patent:
January 9, 2001
Assignee:
SCP Global Technologies, Inc
Inventors:
Josh Butler, Tamer Elsawy, R. Mark Hall, Wyland Atkins, Eric Hansen
Abstract: A process flow for forming a polysilicon-to-polysilicon capacitor performs the capacitor anneal step in a nitrous oxide ambient. As a result, a nitroxide layer forms over heavily doped polysilicon of the upper electrode of the capacitor. This nitroxide layer acts as a barrier against the diffusion of oxygen, preventing further oxidation of the heavily doped polysilicon electrode layer during the subsequent seal oxidation step. The nitroxide barrier layer is readily removed along with the other seal oxide layers immediately before formation of the silicided capacitor electrode contacts, without any attendant danger of overetching of gate oxide or spacer structures. Where the gate polysilicon layer is doped immediately after its formation, an additional capacitor anneal step in a nitrous oxide ambient is necessary to form an additional nitroxide layer.
Abstract: Multiplication circuitry performs a multiply operation to multiply a multiplicand operand and a multiplier operand to form a total product of the multiplication operation, where the multiplier operand includes a plurality of multiplier operand portions. The multiplication circuitry includes multiplier circuitry configured to multiply each of the multiplier operand portions and the multiplicand operand, in a sequence, to form a sequence of partial products corresponding to the sequence of multiplier operand portions. The multiplier circuitry further includes combining circuitry configured, for each multiplier operand portion, to combine the partial product corresponding to that multiplier operand portion with a previous partial result, to generate a new partial result corresponding to that multiplier operand portion.
Abstract: An apparatus for an method of sending and receiving data on a Universal Serial Bus using a memory shared among a number of end points are disclosed. The memory is a double buffer which allows the next packet to be prepared while the current packet is being transmitted. The invention also supports transmission retry.
Abstract: A body of an electronic apparatus includes an upper case and a lower case fitted to the upper case. A display is rotatably mounted on an outer surface of the upper case. A keyboard is attached to an inner surface of the upper case, and a shield plate is fixed to an inner surface of the keyboard. On the shield plate are mounted a memory device and circuit boards with electronic parts. A supporting unit attached to the inner surface of the upper case and arranged to the side of the keyboard has a storing portion for storing a battery pack.
Abstract: A low noise amplifier circuit is operable in two gain modes: high gain (approximately 15 dB) and low gain or attenuation (approximately −5 dB), with a number of gain paths. In the low gain or attenuation path, the frequency response is improved by adding a diode-connected transistor and a capacitor connected in series and operating as a filter, which effectively puts a pole (p=−1/RL Ct) in the peak of the high frequency response.
Abstract: An image processing unit is provided to solve the problem of an aliasing usually occurred when a foreground image and a background image are synthesized by using a key signal; this image processing unit comprises: an image filter circuit that applies to the foreground image an anti-aliasing processing to make obscure an aliasing that displays a slant graphic border in a stepped indentation due to an insufficiency of the number of pixels; a key filter circuit that applies the anti-aliasing processing to the key signal; and a pixel detection circuit that detects a pixel having a possibility to generate a color mixture by an operation of the image filter circuit from the key signal and a size of the image filter circuit. In this construction, the image filter circuit applies an anti-aliasing processing using only the pixel that constitutes the foreground image and does not contain a background color to the pixel having a possibility to generate the color mixture that the pixel detection circuit detects.
Abstract: An automatic control system for a construction machine includes the construction machine provided with a ground leveling implement, a target, and a laser sensor; a survey unit that has a coordinate position measuring element and projects a beam of tracking light indicating a finished-plane height toward the target; a storage unit for storing finished-plane height data in correspondence with a horizontal coordinate position in the coordinate position; and a computation unit for computing the finished-plane height data. The survey unit is equipped with a rotation unit for rotating the laser beam in a vertical direction so that a height of the laser beam at the horizontal coordinate position becomes a height from a determined finished plane. The construction machine is provided with a control unit for controlling the ground leveling implement so that it reaches the finished-plane height, based on a position at which the laser beam is received on the laser sensor.
Type:
Grant
Filed:
November 10, 1997
Date of Patent:
January 9, 2001
Assignee:
Kabushiki Kaisha Topcon
Inventors:
Fumio Ohtomo, Kazuaki Kimura, Vernon J. Brabec, Satoshi Hirano, Makoto Omori
Abstract: The present invention comprises a tubular shunt for insertion into a fluid vessel in a living creature constructed of an elastically deformable material that reduces in circumference when stretched longitudinally so that the ends of the shunt may be easily inserted into openings in a blood vessel and where the material expands circumferentially when allowed to axially contract such that the ends of shunt press against the vessel wall to secure the shunt and form a water tight seal to permit fluid to flow through the tubular conduit of the shunt. A method for shunting fluid-flow in a portion of a vessel in a living creature is also disclosed wherein a shunt of the present invention is stretched longitudinally so that the ends of the shunt contract and then inserted into a lumen of a blood vessel. Following insertion of the shunt, the shunt is allowed to return to its relaxed geometry so that it forms a fluid tight seal with the interior of the lumen.
Abstract: An encoding method and apparatus and a decodings method and apparatus in which the encoded information is decreased in volume and in which the encoding and decoding operations are performed with a smaller processing volume and a smaller buffer memory capacity. The apparatus includes a low range signal splitting circuit for separating low-range side signal components from L and R channel signals converted by a transform circuit into spectral signal components, and a channel synthesis circuit for synthesizing (L+R) channel signal components from the L and R channel spectral signal components.
Abstract: An ESD protection device for use with an integrated circuit that provides a low impedance resistive path between IC pads (including Vdd and Vss pads) when power to the IC is off, while assuring adequate isolation between the IC pads when the power is on. The device includes a semiconductor substrate (typically a p-type Si substrate) and at least two vertically integrated pinch resistors formed in the semiconductor substrate. Each of the vertically integrated pinch resistors is connected to a common electrical discharge line and to a pad. Each of the vertically integrated pinch resistors includes a deep well region and a first surface well region, both of the second conductivity type (typically n-type). The first surface well region circumscribes the deep well region, thereby forming a narrow channel region of the first conductivity type (e.g. p-type) therebetween. When no potential is applied to the first surface well regions (i.e.
Type:
Grant
Filed:
December 3, 1998
Date of Patent:
January 2, 2001
Assignee:
National Semiconductor Corporation
Inventors:
Alexander Kalnitsky, Pavel Poplevine, Albert Bergemont, Hengyang (James) Lin
Abstract: A beverage infuser includes a cap that is attachable to a drinking cup and that includes a drinking port, and a strainer basket attachable to the cap. The strainer basket is configured to hold loose tea leaves, or coffee grounds etc. and includes a position in which it is suspended into the cup when the cap and strainer basket are attached to one another.