Abstract: An antenna is described having a generally elongate radiating part (10) and a reflective plane (11)juxtaposed and generally parallel to the elongate radiating part. The radiating part has a free end (15), a ground connection (13) remote from the free end and a feed connection (16) between the free end and the ground connection. The ground connection is mounted on the reflective plane (11), giving electrical ground connection and mechanical support. A method of manufacture of an antenna is also described involving breaking off an extension portion to suit the required frequency of operation.

Abstract: A digital squelch system (100) includes a timing signal generator (102) for generating a reference window. An edge detector (106) detects edges in the input signal during this reference window. An accumulator (110) accumulates the number of coherencies. An overflow detector (112) coupled to the accumulator (110) detects overflow conditions therein. A latch coupled to the overflow detector (112) squelches and unsquelches the radio (200) when the overflow or underflow conditions have been detected, respectively.

Abstract: An amplifier structure (200) includes a main amplifier loop (203) for efficiently amplifying an input signal at a power amplifier (228) coupled to a load susceptible to impedance variations. The amplifier loop (200) further includes an auxiliary loop (201) coupled to the main loop (201) for simultaneously preventing the power amplifier (228) from operating inefficiently or causing off-channel interference.

Abstract: An electronic device is described having a microprocessor (100) and banked memory (otherwise known as virtual memory, 15, 16) as well as a method of operation of a such a device. A selected program is run from a first banked memory (15). An access program is loaded from the running program into common RAM (11). The access program is run from common RAM and actuates a memory switch (121) to disconnect the first banked memory from the microprocessor and to connect in its place a second banked memory (16). Memory access operations are performed to the second banked memory. The access program activates the memory switch to disconnect the second banked memory and to reconnect the first banked memory and running of the selected program is recommenced. By storing the access program in RAM, there is less usage of valuable common memory space.

Abstract: Briefly, according to the invention, a receiver (100) for receiving and decoding a carder signal is described. A carrier signal is modulated with an information signal which has one of a plurality of formats. The receiver includes a circuit (104) for receiving and demodulating the carrier signal to produce a demodulated signal. The receiver (100) also includes a digital signal processing subsystem (108) for calculating the correlation function of the demodulated signal and based on this correlation function classifies the format of the demodulated signal. A decoder (118) is further included in the receiver (100) to decode the demodulated signal once it has been classified.

Abstract: An electronic device (100) includes a regulator (102) for generating an operating voltage. The device (100) also includes at least one component (110) using the operating voltage and requiring a minimum input voltage for proper operation. The device (100) further includes a sensor (115) for sensing the minimum input voltage of the component (110) to produce a minimum operating voltage. Also included in the device (100) is a feedback circuit (116), responsive to the sensor (115), for feeding the minimum operating voltage to the regulator (102) whereby the regulator (102) alters the output voltage to the level of the minimum operating voltage.

Abstract: A communication device (300) includes a digital modulator (301), a Digital Signal Processor (306), and an amplifier (312). The digital modulator (301) includes an information generator (304) and a peak suppression device (402). The peak suppression device (402) includes a symbol mapper (404) and a symbol scaler (406). The information generated by the generator (401) are mapped on a constellation diagram via the symbol mapper (404). The mapped information is then scaled at the scaler (406) in order to reduce the peak-to-average ratio of the signal at the input to the amplifier (312).

Abstract: An oscillator (100) includes a tank circuit (102) coupled to a an active circuit (108). The feedback (104) provides the necessary feedback between the tank and the active circuit necessary for oscillation. The active circuit (108) is biased via a biasing circuit (106) and coupled out to a load via an external coupling (110). The active circuit (108) includes two transistors (124, 126) coupled to each other in a cascode configuration. Transistor (126) provides the collector current for transistor (124) while preventing it from entering saturation prematurely. The biasing circuit (106) provides sufficient current drain for the transistor (126) in order to provide for optimum phase noise and bandwidth performance of the oscillator 100.

Abstract: A power supply (200) includes a VVC (222) which provides for the efficient conversion of voltages with minimum ripple. The doping of the VVC (222) is altered such that most of the energy is delivered to a load (224) at a substantially constant voltage. The VVC (222) is fabricated using such materials as Zirconium Titanate. The VVC (222) has a high capacitance to volume ratio and therefore results in a significant reduction in the overall size of the power supply (200).

Abstract: A communication device (300) includes a digital modulator (301), a digital to analog converter (308), an RF mixer (310) (306), and an amplifier(312). The digital modulator (301) includes an information generator (304) and a signal processor (306). The processor responds (306) to the generator (304) by alternately mapping the digital information onto a first (502) or a second (504) constellation diagram to produce data symbols. The processor (306) processes the data symbols alternately from the first and second constellation diagrams (502, 504) in order to minimize the peak to average power ratio at the amplifier (312). This alternating scheme allows the power amplifier to operate more efficiently and thereby conserve precious battery energy.

Abstract: A ruggedized liquid crystal display (LCD) is described having a LCD sandwich (30, 31). A layer of adhesive material (35), such as adhesive coated polyester film, extends continuously across a surface (e.g. the top surface) of the LCD sandwich. A layer of rigid transparent material (e.g. glass) is mounted facing the LCD sandwich and is bonded to the LCD sandwich by the layer of adhesive material.

Abstract: A frequency modulator (100) is provided which includes a VCO (200) having a modulation varactor (122) coupled to its output (128). The VCO (200) includes a resonator stage (112) coupled to an amplifier stage comprising a transistor (118). Coupling of the varactor (122) and the resonator stage (112) is provided via the phase collector capacitance (C.mu.) of the transistor (118).

Abstract: An antenna comprises a feed port, a 1/2 wavelength radiator (20), and a double resonant transformer (10). The feed, port, having a signal feed portion (34) and a ground portion (44), is at a low impedance while the 1/2 wavelength radiator (20) has opposed high impedance ends (21 and 22). For transforming low impedance to high impedance, at two resonant frequencies, the double resonant transformer is coupled between the feed port and the 1/2 wavelength radiator.