Abstract: An oxynitride material is used to form shallow trench isolation regions in an integrated circuit structure. The oxynitride may be used for both the trench liner and trench fill material. The oxynitride liner is formed by nitriding an initially formed oxide trench liner. The oxynitride trench fill material is formed by directly depositing a high density plasma (HDP) oxide mixture of SiH4 and O2 and adding a controlled amount of NH3 to the plasma mixture. The resultant oxynitride structure is much more resistant to trench fill erosion by wet etch, for example, yet results in minimal stress to the surrounding silicon. To further reduce stress, the nitrogen concentration may be varied by varying the proportion of O2 to NH3 in the plasma mixture so that the nitrogen concentration is maximum at the top of the fill material.

Abstract: A semiconductor wafer provided with a thermosetting porous insulating film, wherein the insulating film is made porous, cured and polymerized on the wafer. The film is characterized by a very low dielectric constant based on its constituency and porosity, the latter property of which is caused by the inclusion of liquid or supercritical carbon dioxide in the polymeric reaction mixture.

Abstract: A color liquid crystal display device is disclosed which is capable of securing sufficient luminance while achieving a high National Television System Committee (NTSC) ratio. Specifically, a liquid crystal display device is disclosed which includes a cold cathode fluorescent light tube as a light source, and a liquid crystal display panel for displaying images by controlling transmission of light from the cold cathode fluorescent light tube. The liquid crystal display panel includes a color filter substrate having color filter layers of red, green and blue, a thin film transistor (TFT) array substrate, and a liquid crystal material filled between the TFT array substrate and the color filter substrate. The cold cathode fluorescent light tube is a tri-phospher fluorescent fluorescent light tube, which utilizes Zn2SiO4:Mn as a green phosphor.

Abstract: A method for forming a uniform layered structure comprising an ultra-thin layer of amorphous silicon and its thermal oxide is disclosed. In one aspect, a method for forming a nanolaminate of silicon oxide on a substrate is disclosed. In another aspect, a method for forming a patterned hard mask on a substrate is disclosed. The patterned hard mask includes a nanolaminate of silicon and silicon oxide. The methods are characterized by the oxidation of an amorphous silicon layer using atomic oxygen.

Abstract: A method and structure for fabricating an electronic device using an SOI technique that results in formation of a buried oxide layer. The method includes fabricating at least one first component of the electronic device and fabricating at least one second component of the electronic device, wherein the first component and the second component are on opposite sides of the buried oxide layer, thereby causing the buried oxide layer to perform a function within the electronic device. Entire circuits can be designed around this technique.

Abstract: A system, operable on a plurality of different computer operating systems, for providing web browser access to the operating system desktop having icons displayed on a screen thereof, wherein the desktop icons provide links to executable programs of and information displayable by the operating system. The process comprises first determining, for each icon to be accessed, an executable program linked to the icon, a data file used by the program, and the location of the program and data file. Then the process comprises constructing a web page of the accessed icons and linked programs and data file by assigning a HTML tag to the program and data file of each icon. The HTML tag may include an optional parameter for use by the executable program. The web page is viewable on a web browser such that the HTML tags are displayed on the web page and executable by the web browser to execute the programs on the operating system.

Abstract: A limiting amplifier comprises a differential amplifying stage combined with a differential output stage. The limiting amplifier is characterized in that a first and a second resistor means are coupled to the differential amplifying stage and to the differential output stage. The proposed arrangement leads to a constant gain ratio thereby providing a gain circuit that is independent over the process and the temperature variations.

Abstract: A method is disclosed for forming an epitaxial layer on a front side of a substrate formed of a monocrystalline material, using a chemical vapor deposition system. In this method, a plurality of gettering wafers formed of a gettering material are arranged in the CVD system, such that the front side of each substrate is facing one of the gettering wafers. Impurities present in the CVD system during formation of the epitaxial layer are gettered by the gettering wafers. Alternatively, a layer of a gettering material is deposited on a back side of each of the plurality of substrates, and the substrates are arranged such that the front side of each substrate is facing the backside of another of the substrates. In another embodiment, a layer of a gettering material is deposited on an interior surface of the CVD system. Impurities removed from the CVD system during epitaxial formation include oxygen, water vapor and other oxygen-containing contaminants.

Abstract: A method for manufacturing a magnetoresistive random access memory (MRAM) cell is disclosed, which alleviates the problem of Neel coupling caused by roughness in the interface between the tunnel junction layer and the magnetic layers. The method includes depositing first and second barrier layers on the conductor, wherein the first barrier layer has a polish rate different from that of the second barrier layer. The second barrier layer is then essentially removed by chemical mechanical polishing (CMP), leaving a very smooth and uniform first barrier layer. When the magnetic stack is then formed on the polished first barrier layer, interfacial roughness is not translated to the tunnel junction layer, and no corruption of magnetization is experienced.

Abstract: A process of cleaning of objects that relate to semiconductor fabrication processes, such as, for example, conductive paste screening in the production of multilayer ceramic substrates and composite solder paste by stencil printing in electronic circuit assembly. Specifically, the process removes a metal/polymer composite paste from screening masks and associated paste making and processing equipment used in printing conductive metal pattern onto ceramic green sheet in the fabrication of semiconductor packaging substrates. The process also cleans solder paste residue from stencil printing equipment used in electronic module assembly surface mount technology for SMT discretes, solder column attachment, and BGA (Ball Grid Array) attachment on ceramic chip carrier or for screening solder paste onto printed circuit board.

Abstract: An advanced back-end-of-line (BEOL) metallization structure is disclosed. The structure includes a diffusion barrier or cap layer having a low dielectric constant (low-k), where the cap layer is formed of silicon nitride by a plasma-enhanced chemical vapor deposition (PE CVD) process. The metallization structure also includes an inter-layer dielectric (ILD) formed of a carbon-containing dielectric material having a dielectric constant of less than about 4, and a continuous hardmask layer overlying the ILD which is preferably formed of silicon nitride or silicon carbide. A method for forming the BEOL metallization structure is also disclosed. The method includes a pre-clean or pre-activation step to improve the adhesion of the cap layer to the underlying copper conductors. The pre-clean or pre-activation step comprises exposing the copper surface to a reducing plasma including hydrogen, ammonia, nitrogen and/or noble gases.

Abstract: The present invention relates generally to a new ceramic structure and process thereof. Basically, the present invention relates to a structure and method for forming laminated structures and more particularly to a structure and method for fabricating multi-layer ceramic products using very thin green sheets and/or green sheets with very dense electrically conductive patterns on top of a stronger support sheet. The structure and method of the present invention enables the screening, stacking and handling of very thin green sheets and/or green sheets with very dense metallized patterns in the manufacture of multi-layer ceramic packages. The thin green sheets were tacked/bonded to thicker and stronger support sheets to form a sub-structure which had excellent stability in screening and enabled further processing. The sheets are anchored or pinned in such a way as to allow the processing of the green sheet with the subsequent easy removal of the support sheet.

Abstract: A process and system for updating desired inter- or intra-net addresses at a client computer. There is provided a plurality of client computers, a database accessible by each of the client computers, a network server through which the client computers may access files on a network, and a database accessible by the network server. The client computer database includes a list of addresses for accessing desired files on the network. The network server database includes a list of addresses for the desired files on the network and addresses of the client computers that have accessed the desired files on the network. The process comprises updating in the network server database at least one of the addresses for the desired files on the network and transferring from the network server database to the database of the client computers having addresses in the network server database the updated at least one of the addresses for the desired files on the network.

Abstract: There is disclosed a method of forming contacts and metal lands onto a semiconductor structure at the first level of metallization (M0). The initial structure is a silicon substrate having diffusion regions formed therein and a plurality of gate conductor stacks formed thereon. The structure is passivated by an insulating layer. Contact holes of a first type are etched in the insulating layer to expose some diffusion regions, then filled with doped polysilicon to form conductive studs substantially coplanar with the insulating layer surface. A first mask (M0) is formed at the surface of the structure to expose M0 land recess locations including above said studs. The masked structure is anisotropically dry etched to create M0 land recesses. Next, the M0 mask is removed. A second mask (CS) is formed at the surface of the structure to expose desired contact hole locations of a second type.

Abstract: An oxynitride material is used to form shallow trench isolation regions in an integrated circuit structure. The oxynitride may be used for both the trench liner and trench fill material. The oxynitride liner is formed by nitriding an initially formed oxide trench liner. The oxynitride trench fill material is formed by directly depositing a high density plasma (HDP) oxide mixture of SiH4 and O2 and adding a controlled amount of NH3 to the plasma mixture. The resultant oxynitride structure is much more resistant to trench fill erosion by wet etch, for example, yet results in minimal stress to the surrounding silicon. To further reduce stress, the nitrogen concentration may be varied by varying the proportion of O2 to NH3 in the plasma mixture so that the nitrogen concentration is maximum at the top of the fill material.

Abstract: The present invention relates to a method and apparatus for reducing data errors in a magneto-resistive random access memory (MRAM). According to the disclosed method, data bits and associated error correction code (ECC) check bits are stored into a storage area. Thereafter, the data bits and ECC check bits are read out and any errors are detected and corrected. A data refresh is then initiated based on a count and data bits and associated ECC check bits stored in the storage area are then refreshed by accessing the stored data bits and the associated ECC check bits, and ultimately by checking, correcting and restoring the data bits and the ECC check bits to the storage area.

Abstract: A method of forming a substantially uniform oxide film over surfaces with different level of doping and/or different dopant type is disclosed. In one aspect, a method for forming a uniform oxide spacer on the sidewalls of heavily doped n- and p-type gates is disclosed. The method includes providing a semiconductor substrate having at least two regions with dissimilar dopant characteristics, optionally heating the substrate; and forming a uniform oxide layer over the at least two regions by exposing the substrate to a gaseous mixture including atomic oxygen.

Abstract: A new class of fluorinated arylacetylene compounds useful as monomers in the formation of polymers having low dielectric constant. These polymers, which are the reaction products of one of the fluorinated arylacetylene compounds, a diphenyl oxide biscyclopentadienone and, optionally, 1,3,5-tris(phenylacetylene)benzene, are useful in insulating microelectric device.

Abstract: A method of fabricating a semiconductor structure where a low gate resistance is obtained, while simultaneously reducing silicon consumption in the source/drain diffusion regions. The method provides a semiconductor structure having a thin silicide region formed atop source/drain regions and a thicker silicide region formed atop gate regions. The method includes: first forming a structure which includes self-aligned silicide regions atop the source/drain diffusion regions and the gate region. A non-reactive film and a planarizing film are then applied to the structure containing the self-aligned silicide regions and thereafter a thicker silicide region, as compared to the self-aligned silicide region located atop the source/drain regions, is formed on the gate region.

Abstract: The present invention relates generally to a new dielectric forming metal/ceramic laminate magnet and process thereof. More particularly, the invention encompasses a new process for fabrication of a large area laminate magnet with a significant number of holes, integrated dielectric forming metal plate(s) and electrodes for electron and electron beam control. The present invention also relates to a magnetic matrix display and electron beam source and methods of manufacture thereof.