Abstract: The present invention provides a method and a system for generating an exception handling instruction and for avoiding the execution of unnecessary instructions. More particularly, an internal opcode in a compiler is read and one internal opcode is obtained. Whether or not the obtained internal opcode is an instruction for which exception checking is required is determined. If exception checking is required for the opcode, an exception checking instruction having a sequence of bits that are uniquely determined must be generated in accordance with the type of exception, without generating an instruction for substituting into a register a label indicating the type of exception. Then, a processor instruction is generated corresponding to the obtained internal opcode. The above processing is repeated for the remaining internal opcode, and an exception handling instruction is generated.

Abstract: A method of manufacturing an integrated circuit device includes forming a laminated structure having a first side and a second side, the first side includes a first type Mott channel layer and the second side includes a second type Mott channel layer. A first source region and a first drain region is formed on the first side, a second source region and a second drain region is formed on the second side, a first gate region is formed on the second side, opposite the first source region and the first drain region and a second gate region is formed on the first side, opposite the second source region and the second drain region. The first source, the first drain and the first gate comprise a first type field effect transistor and the second source, the second drain and the second gate comprise a second type field effect transistor.

Abstract: An organic polymer film can be completely decomposed and removed from a substrate surface by exposing the film to ultraviolet radiation having a wavelength of 180 nm or less. Also, ultraviolet radiation not longer than 180 nm in wavelength is scarcely transmitted through a transparent conductive oxide such as ITO and, thus, can be used for eliminating a defective polyimide alignment film formed on a color filter substrate and an array substrate having a transparent electrode pattern of ITO formed on the surface of a pigment portion and a TFT structure, respectively. According to the present invention, the defective alignment film on the substrates can be removed completely without any damage such as discoloring of the pigment portion and/or changing the TFT characteristics.

Abstract: A digital micro mirror device (and a single-panel color projector using a digital micro mirror device) includes a reflection surface including an array of micro mirrors. The reflection surface is divided into two or more areas, and the axis direction about which a mirror of the array of micro mirrors rotates in one area is the same for all of the micro mirrors in the area. The single-panel color projector includes a white light source, a color separator for separating a white light from the white light source into two or more light beams, the digital micro mirror device reflecting the two or more light beams, an illumination light establishing unit for illuminating the two or more light beams from the color separator, and a projection unit for collecting and projecting light reflected from the digital micro mirror device.

Abstract: Magnetoresistive devices are disclosed which include a changeable magnetic region within which at least two magnetic states can be imposed. Upon magnetoresistive electrical interaction with the device, the relative orientation of the magnetic states of the changeable magnetic region, and a proximate reference magnetic region, can be sensed thereby providing a binary data storage capability. The present invention limits the electrical interaction to only a preferred portion of the changeable magnetic region, e.g., the portion within which the two magnetic states can be dependably predicted to be substantially uniform, and opposite of one another. Structures for limiting the electrical interaction to this preferred portion of the changeable magnetic region are disclosed, and include smaller interaction regions, and alternating areas of insulation and conductive, interaction regions, disposed proximate the changeable magnetic region.

Abstract: A cable (and heat sink) for radiating heat includes a heat conducting and radiating member for conducting heat in a longitudinal direction of the cable and radiating the conducted heat. The heat sink includes the cable for radiating heat, and a heat connecting member for thermally connecting a heat generator to the cable.

Abstract: A method and structure for producing metallic polymer conductor lines comprising of an alternative methodology to a traditional damascene approach, called a cloisonne or inverse damascene approach. The cloisonne approach comprises the steps of coating a photosensitive polymer such as pyrrole or aniline with a silver salt on a semiconductor substrate. Using standard photolithography and resist developing techniques, the conducting polymer is exposed to a wet chemical developer, removing a portion of the exposed conducting polymer region, leaving only conducting polymer lines on top of the substrate. Next, an insulating dielectric layer is deposited over the entire structure and a chemical mechanical polish planarization of the insulator is performed creating the conducting polymer lines. Included in another aspect of the invention is a method and structure for a self-planarizing interconnect material comprising a conductive polymer thereby reducing the number of processing steps relative to the prior art.

Abstract: A method and structure for preventing damage to an electronic device. The structure includes a sensor outputting signals indicating environmental conditions experienced by the electronic device, a non-volatile memory storing ones of the signals that exceed a limit, and an output device outputting signals stored in the non-volatile memory, thereby providing a history of the environmental conditions experienced by the electronic device that exceed the limit.

Abstract: A low cost LCD device employing a high speed field sequential drive scheme.

Abstract: A semiconductor memory and a method of producing the memory, includes a transistor including a first gate having an oxide, and a channel, and a back-plane including a second gate and an oxide thereover, the second gate formed opposite to the channel of the transistor, the second gate including a floating gate, wherein a thickness of the oxide of the back-plane is separately scalable from an oxide of the first gate of the transistor.

Abstract: A method and structure for simultaneously producing a dynamic random access memory device and associated transistor is disclosed. The method forms channel regions and capacitor openings in a substrate. Next, the invention deposits capacitor conductors in the capacitor openings. Then, the invention simultaneously forms a single insulator layer above the channel region and above the capacitor conductor. This single insulator layer comprises a capacitor node dielectric above the capacitor conductor and comprises a gate dielectric above the channel region.

Abstract: An N-channel metal oxide semiconductor (NMOS) driver circuit (and method for making the same), includes a boost gate stack formed on a substrate and having a source and drain formed by a low concentration N-type implantation, and an N-driver coupled to the boost gate stack.

Abstract: An organic light emitting device is provided having a substrate (60), an anode contact electrode (64), a cathode contact electrode (61), and an organic region (62, 63) in which electroluminescence takes place if a voltage is applied between the anode (64) and cathode (61). At least one of the electrodes (61, 64) comprises a non-degenerate wide bandgap semiconductor.

Abstract: An organic light emitting device (and a method for producing the device) includes a multilayered structure with a substrate layer providing a first electrode layer, a second electrode layer and at least one light emitting organic material layer between the first and second electrode layers. The second electrode layer includes at least two separate layers. That is, a semi-transparent metal electrode layer and a light transparent lateral conductor layer is deposited onto the light emitting organic material layer by depositing the semi-transparent metal electrode layer onto the light emitting organic material layer, depositing subsequently at least one protection layer thereupon and depositing the light transparent lateral conductor layer onto the protection layer.

Abstract: A method for constructing oxide electrodes for use in an OxFET device is disclosed. The electrodes are formed by first depositing a double layer of conducting perovskite oxides onto an insulating oxide substrate. A resist pattern with the electrode configuration is then defined over the double layer by means of conventional lithography. The top oxide layer is ion milled to a depth preferably beyond the conducting oxide interface, but without reaching the substrate. Chemical etching or RIE is used to remove the part of the lower conductive oxide layer exposed by ion milling without damaging the substrate. Source and drain electrodes are thereby defined, which can be then be used as buried contacts for other perovskites that tend to react with metals. Also disclosed is a field effect transistor structure which includes these source and drain electrodes in a buried channel configuration.

Abstract: A static redundancy arrangement for a circuit using a focused ion beam anti-fuse methodology which reduces the circuit layout area and the switching activity compared to a prior art dynamic redundancy scheme, resulting in less power, a simpler design and higher speed. Focused ion beam anti-fuse methodology is used to program redundancy for circuits, particularly wide I/O embedded DRAM macros. An anti-fuse array circuit is comprised of a plurality of anti-fuse programming elements, each of which comprises a latch circuit controlled by a set input signal, and an anti-fuse device which is programmed by a focused ion beam.

Abstract: A method of generating or modifying patterns of topically specific magnetic modifications in an at least potentially ferromagnetic surface comprising the step of subjecting the surface to a controlled impact of energized subatomic particles, preferably in the form of electron radiation, directed at the surface for producing a predetermined pattern of discrete magnetized areas on the surface. The method serves to increase the density of magnetically coded information on magnetic media, such as hard disks.

Abstract: A semiconductor device and a method for forming the semiconductor device, include forming a mandrel, forming spacer wordline conductors on sidewalls of the mandrel, separating, by using a trim mask, adjacent spacer wordline conductors, and providing a contact area to contact alternating ones of pairs of the spacer wordline conductors.

Abstract: Arrays of microelectronic elements such as magnetorestive memory elements and FET's, including dual-gate FET's, are fabricated by methods involving a host wafer and a first wafer on which part of the microelectronic elements are separately formed. Conductive elements such as metal-filled vias are formed in the host wafer and extend to its surface. Hydrogen ions are implanted at a selected depth in the first wafer. After formation of selected portions of the microelectronic elements above the hyrogen ion implantation depth of the first wafer, the latter is bonded to the surface of the host wafer so that complementary parts of the two wafers can join to form the microelectronic elements. The first wafer is fractured at the hydrogen ion implantation depth and its lower portion is removed to allow for polishing and affixing of electrodes thereon.

Abstract: In a DRAM memory circuit, a current sensing amplifier is provided that exploits the low impedance of a reference transistor biased in the sub-threshold regime to enable transfer of a small voltage swing on the bitline to result in a large voltage signal on a low capacitance sense node. Compared to conventional voltage sensing, reduced bitline-bitline coupling noise results because of the small bitline swing, potentially allowing more cells to be served by a sense amplifier because of weak dependence of sense amplifier on bit-line capacitance. Compared to previous current-sensing schemes, this invention allows no idling current. The current-sensing amplifier additionally may be used in conjunction with a hierarchical bitline scheme to further increase the number of cells served by each sense amplifier.