Abstract: A circuit technique is disclosed for compensating for changes in the resistance of an integrated circuit resistor in an epitaxial bed, which is exposed to temperature changes. The resistance of an integrated circuit resistor is a function of the temperature at which is operates. The invention is based on the recognition that the resistance of the resistor is also a function of the potential difference between the body of the resistor and the epitaxial bed itself. Temperature compensation is achieved by connecting a temperature sensing circuit to the epitaxial bed, which has a voltage output which varies inversely with respect to the temperature coefficient of resistance of the resistor. Thus, the net change in the resistance of the resistor as it undergoes a temperature change, approximates zero.

Abstract: Testing combinatorial logic sectioned into macros. The macros perform functions some of which are linear, such as busses, and some of which are non-linear such as PLAs, with the macros being connected so that the total chip can be tested by testing each macro individually to thereby make it unnecessary to model the totality of the macros collectively in terms of primitive logic.

Abstract: A high density integrated circuitry package is disclosed where gates containing the circuit cards are rotatably mounted in the cabinet with some of the gates fixed to a central core and other gates pivoted to the core. The pivoted gates are extendable outside of the cabinet for diagnostic and maintenance purposes and for simultaneously providing access to the fixed gates.

Abstract: The invention is a process of fabricating semiconductor devices including an insulating film across the surface that has a planar configuration. Alternatively, the film may be of uniform thickness and non-planar configuration. Both the planar and uniform thickness characteristics of the insulating film permit openings to be formed therein without over etching a defined surface area and conductors to be formed thereon without broadening. An important feature of the invention is utilizing the differential growth rate of films on semiconductor surfaces and/or selection of a suitable initial film thickness as a diffusion mask. The initial film thickness also contributes to a planar or uniform film thickness or other configuration across the device.

Abstract: Protective devices and circuits for insulated gate transistors are improved by another p/n junction diode or MOS diode preventing breakdown of the thin oxide of the protective device. The breakdown voltage of the protective device or p/n diode may be tailored to a preselected voltage by altering its metallurgical junction by ion implantation or other techniques. Tailoring permits the breakdown voltage of the protective device to be independent of process and circuit specification of a protected or internal circuit. A plurality of parallel circuits connected as a protective device limits or controls secondary breakdown of the protective device.

Abstract: Utilization of a chip internal clock driver, for capacitive loads such as MOS circuits, which provides in response to an external clock phase adjustable and delayed secondary clock pulses. The delay circuit is an inverter circuit which uses a precharged coupling capacitor whose potential is dynamically increased (boosted) by capacitive coupling the input pulse to approximately twice the supply voltage and which capacitor is subsequently discharged by a constant current thus defining a delay time in a more extended and more precise range.

Abstract: A valve assembly having a small volume cavity formed therein which communicates with two valves, one of which is closed completely before the other one is opened and vice versa. An actuating mechanism holds a valving member in one of the valves in an opened condition to thereby maintain a fluidic path through the one valve and the cavity. The other valving member at this time lies in a closed position preventing communication between this valve and the cavity. The actuating mechanism when actuated moves away from the valving member in the open valve allowing the open valve to close completely. The fluidic path through the one valve is thereby broken. A second fluidic path is made when the actuating mechanism moves the other valving member to an opened position.

Abstract: A metal gate transistor is fabricated to have reduced gate overlap of source/drain regions and increased oxide thickness over the diffused regions whereby parasitic capacitance is reduced and switching speed is increased.

Abstract: Surface leakage paths on bipolar and FET transistors may be significantly reduced by the presence of a fixed charge in an insulating layer adhered to a semiconductor wafer. The fixed charge consists of ions which are introduced into the insulating layer after all high-temperature process treatments have been performed on the wafer. The ions are introduced into the insulating layer by (1) immersing the wafer in a solution of a suitable metal salt; (2) sandwiching the wafers between carefully cleaned non-immersed wafers and (3) driving the ions to the insulating layer-wafer interface by heating the wafer stacks in a furnace at a preselected temperature. The effective charge level embedded in the insulating layer is sufficient to protect against inversion of the wafer surface due to conductors on the insulating layer having negative potentials exceeding 10 volts and overlying the stored-charge area.

Abstract: A rotor stator assembly comprising a stepping motor having an improved torque-to-inertia ratio resulting from a substantial reduction in moment of inertia due to the conical shape of the rotor. A core energized by a DC coil is disposed axially of the base of the conical rotor and the magnetic path is through the base of the rotor, out its periphery, through the stator, through conductive members and back to the core. There is a further increase in torque-to-inertia ratio which is due to a decrease in rotating mass when the rotor is hollow.