Abstract: A plurality of masters arbitrate for access to a shared memory device, such as a SDRAM (synchronous dynamic random access memory), amongst themselves using software and arbitration interfaces. The masters generate additional commands upon arbitration, such as MRS and PALL commands, for prevention of collision of commands, refresh starvation, and/or a missing pre-charge operation in the shared memory device.
Abstract: In a method and system for performing color correction for an image signal, a first set of matrix coefficients for color correction of the image signal in a 3-dimensional RGB color space is transformed to a first set of points of a two-dimensional XY plane. In addition, the first set of points is modified to a second set of points in the XY plane for tuning image quality. Furthermore, the first and second sets of points in the two-dimensional XY plane are displayed such as on a graphical user interface of a computer system.
Abstract: For correlated double sampling in an image sensor, a comparator receives and compares a reset signal and a sensing signal from a pixel of the image sensor. Also, a controller adjusts a voltage at a controlled input of the comparator to compensate for offset of the comparator from feed-back of an output of the comparator. The controller includes at least one charging current source and at least one discharging current source that are controlled to adjust such a voltage.
Abstract: For clock and data recovery (CDR), a clock processor generates sampling clock signals from original phase-shifted clock signals each having a frequency that ? of a frequency of an input data signal. The sampling clock signals are used to sample the input data signal for generating error signals and reference signals that determine a voltage control signal that indicates a clock frequency of the original clock signals generated by a voltage controlled oscillator (VCO).
Abstract: A time-to-digital converter includes low and high resolution time-to-digital converters for providing both high resolution and wide measurement range. The low resolution time-to-digital converter measures a time difference between first and second signals with a first quantization step. The high resolution time-to-digital converter measures the time difference between the first and second signals with a second quantization step that is smaller than the first quantization step. The low resolution time-to-digital converter has a wider measurement range than the high resolution time-to-digital converter.
Type:
Grant
Filed:
November 23, 2007
Date of Patent:
February 23, 2010
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Hyoung-Chul Choi, Seong-Hwan Cho, So-Myung Ha
Abstract: A pixel circuit of an image sensor includes a floating diffusion node and a reset transistor. The reset transistor is coupled between the floating diffusion node and a reset control signal node of another pixel circuit of the image sensor. A voltage applied on the reset control signal node of the other pixel circuit is a reset voltage transmitted to the floating diffusion node via the reset transistor.
Type:
Grant
Filed:
June 8, 2006
Date of Patent:
January 26, 2010
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Young-Chan Kim, Tetsuo Asaba, Yi-Tae Kim
Abstract: For performing a retry in a data storage device, a spin jitter value corresponding to a desired sector of a disc is determined. A read timing is adjusted according to the spin jitter value of the desired sector. A retry of a data read is performed for the desired sector with the adjusted read timing. Thus, the present invention accounts for eccentricity of the disc as indicated by the spin jitter value during retry of the data read operation.
Abstract: A signal converter includes a signal converting unit and a compensation unit. The signal converting unit generates intermediate differential signals at intermediate nodes in response to a single-ended signal. The compensation unit generates compensated differential signals at output nodes by minimizing phase and amplitude mismatch errors between the intermediate differential signals. The compensation unit includes a pair of transistors and a pair of capacitors configured in symmetry between the intermediate and output nodes. The signal converter of the present invention may be used to particular advantage in an RF receiver.
Abstract: A mask read-only memory (ROM) includes a dielectric layer formed on a substrate and a plurality of first conductive lines formed on the dielectric layer. A plurality of diodes are formed in the first conductive lines, and a plurality of final vias are formed for a first set of the diodes each representing a first type of memory cell, with no final via being formed for a second set of diodes each representing a second type of memory cell. Each of a plurality of second conductive lines is formed over a column of the diodes.
Type:
Grant
Filed:
June 27, 2007
Date of Patent:
December 29, 2009
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Yong-Kyu Lee, Hee-Seog Jeon, Jeong-Uk Han, Young-Ho Kim, Myung-Jo Chun
Abstract: A charge pump includes a current source/sink unit that charges/discharges an output node in response to an UP/DOWN signal generated by a PFD (phase frequency detector). The charge pump also includes a pull-down/pull-up unit configured to discharge/charge a cascode node within the current source/sink unit for a limited time period after the UP/DOWN signal reaches a threshold level during transition of the UP/DOWN signal for turning off the current source/sink unit.
Abstract: A display driver generates a respective charge pumping signal and respective driving signals synchronized to a respective same clock signal for each of the CPU and video interface modes. Because such respective signals are synchronized to a respective same clock signal, the noise superimposed on the driving signals applied on a display panel is regular and uniform across the whole display panel, for each of the CPU and video interface modes. Accordingly, affects of such regular noise are advantageously not noticeable to the human eye, for both the video and CPU interface modes of operation.
Type:
Grant
Filed:
November 12, 2004
Date of Patent:
December 15, 2009
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Won-Sik Kang, Jae-Koo Lee, Jae-Hoon Lee
Abstract: A signal generation apparatus includes a signal generation portion and a phase compensator. The phase compensator generates a phase error control signal that maintains a phase difference between the in-phase and quadrature-phase signals generated by the signal generation portion. The phase compensator includes an offset compensator and a delay compensator. The offset compensator is set to compensate for an offset voltage through the phase compensator. The delay compensator is set to compensate for a difference of delays through paths for the in-phase and quadrature-phase signals within the phase compensator.
Abstract: A semiconductor memory device includes a memory cell array, a decoder, and an access control unit. The decoder generates a word line voltage according to an address for a plurality of memory cells in the memory cell array. The access control unit controls access to the plurality of memory cells according to the word line voltage and additional access information separate from the address.
Abstract: In inspecting for quality of underfill material dispensed in an IC package, a camera image is captured for the IC package having the underfill material dispensed between an IC die and a package substrate. A data processor analyzes the camera image to determine an occurrence of an unacceptable condition of the underfill material. Pre-heating and/or post-heating of the package substrate before and/or after dispensing the underfill material by a contact-less heater ensures uniform spreading of the underfill material.
Type:
Grant
Filed:
November 30, 2005
Date of Patent:
November 24, 2009
Assignee:
Advanced Micro Devices, Inc.
Inventors:
Keng Sang Cha, Tek Seng Tan, Haris Fazelah, Ahmad Zahrain B. Mohamad Shakir
Abstract: For supplying voltage to at least one main current consuming unit, a voltage supply unit provides the voltage to the at least one main current consuming unit at a supply node. In addition, an auxiliary current consuming unit conducts auxiliary current from/to the supply node for at least a predetermined time period before the at least one main current consuming unit begins to conduct current. Thus, voltage overshoot is prevented at the supply node.
Abstract: For generating source line voltages in a display device, gray scale data is received at a source driver for a first sub-pixel of a pixel. The source driver generates a first source line voltage for the first sub-pixel and a second source line voltage for a second sub-pixel from the gray scale data of the first sub-pixel. Thus, data transfer rate and/or data buses are minimized for in turn minimizing power consumption and EMI (electromagnetic interference).
Abstract: A semiconductor driver circuit includes impedance units for generating impedances at data pads, independently of each-other. Thus, signal swing widths of data signals generated at the data pads may be easily adjusted to be substantially equal for high operating speed. The semiconductor driver circuit also includes switching units for uncoupling at least one of the impedance units from at least one of the data pads for enhanced testing of the data pads.
Type:
Grant
Filed:
October 4, 2005
Date of Patent:
October 6, 2009
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Gyung-Su Byun, Kyu-Hyoun Kim, Woo-Seop Kim
Abstract: A tape circuit substrate includes a base film with first wiring and second wiring disposed on the base film. The first wiring extends into a chip mount portion through a first side and bends within the chip mount portion toward a second side. The second wiring extends into the chip mount portion through a third side and bends within the chip mount portion toward the second side. The first, second, and third sides are different sides of the chip mount portion. Thus, size and in turn cost of the base film are minimized by arranging wirings within the chip mount portion for further miniaturization of electronic devices, such as a display panel assembly, using the tape circuit substrate.
Type:
Grant
Filed:
October 27, 2004
Date of Patent:
October 6, 2009
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Sang-Ho Park, Sa-Yoon Kang, Si-Hoon Lee
Abstract: For arbitrating access to a shared memory device among a plurality of masters, a master generates a request for access signal that is sent to the arbitrator concurrently with an indispensable command such as an auto-refresh command that is generated in series. The arbitrator generates an acknowledge signal sent to the master for indicating approval or rejection for access. Existing pins of the master are used for transmission of such arbitration signals.
Abstract: A data output circuit includes a sense amplifier and first and second latches. The sense amplifier is for amplifying differential data to generate amplified differential data. The first latch is for latching the amplified differential data to generate first latched data having a same phase as the amplified differential data. The second latch is for latching the amplified differential data to generate second latched data having an opposite phase from the amplified differential data. The amplified differential data from outputs of the sense amplifier are applied substantially simultaneously to inputs of the first and second latches.