Abstract: A video circuit including a video amplifier adapted to generate an amplified output video signal from an input video signal; a short detection circuit adapted to generate a first signal indicative of whether there is a short present at an output of the video amplifier; and a load detection circuit adapted to generate a second signal indicative of whether there is a load coupled to the output of the video amplifier. The video circuit may further include an input signal detection circuit adapted to generate a third signal indicative of whether an input video signal is present. The third signal generated by the input signal detection circuit may be used to enable the outputting of the first and second signals in order to prevent the false indication of faults at the output of the video amplifier in the absence of an input video signal.

Abstract: A system, apparatus and a method are described that provide a voltage clamp for a single-supply system. In particular, a negative voltage clamp prevents a negative over-voltage in a system having only a positive independent voltage source. For example, certain analog-to-digital converters and other circuits allow input signals below the negative supply, or ground in single-supply systems, either by direct sampling or using input attenuation resistors. The negative clamp allows the circuit to provide accurate negative over-voltage protection and the absence of this claim would result in over-voltage protection in positive voltage directions only.

Abstract: A method, system, and program product for quantizing discrete cosine transform coefficients, e.g., for MPEG compression, with minimal bit rate overhead and without using a quantization matrix. This is done by scaling a uniform quantization parameter for the entire discrete cosine transform block, defining a variety of thresholds for the quantization of discrete cosine transform coefficients below which the corresponding coefficient will be quantized to zero, and setting different normative reconstructed values for coefficients that have not been quantized to zero as the decoder will still use the original, unmodified reconstructed values as long as the corresponding coefficient is not zero.

Abstract: An apparatus for generating a pulse having a pulse width substantially independent of process variation in resistive and capacitive values. The apparatus includes a PTAT current source to generate a first current to charge a capacitor to produce a first voltage; a ?VGS current source to generate a second current through a resistor to produce a second voltage V2; a comparator to generate the pulse in response to the first and second voltages; and a circuit to enable the charging and discharging of the capacitor. The use of the distinct current sources (e.g., PTAT and ?VGS) enables the pulse generator to be configured substantially process independent of resistive value. The use of a MOSFET capacitor for the capacitor enables the pulse generator to be made substantially process independent of capacitive value. An additional bandgap current source in parallel with the ?VGS current source reduces the pulse width dependency on temperature.

Abstract: Embodiments of the present invention provide systems, devices and methods for improving the efficient deployment and configuration of networking equipment within a network build-out. In certain embodiments of the invention, an iterative analysis of inter-node equipment placement and connectivity, and inter- and intra-node traffic flow is performed to identify a preferred deployment solution. This analysis of deployment optimization takes into account both configurations from a network node perspective as well as from a network system perspective. Deployment solutions are iteratively progressed and analyzed to determine a preferred solution based on both the cost of deployment and satisfaction of the network demands. In various embodiments of the invention, a baseline marker is generated from which the accuracy of the solution may be approximated that suggests to an engineer whether the deployment is approaching an optimal solution.

Abstract: Disclosed are systems and methods for improving the thermal performance of integrated circuit packages. Aspects of the present invention include improved thermal package structures and methods for producing the same through the application of one or more thermal spreaders in the package. In embodiments, a thermal spreader is incorporated in a semiconductor chip package between a semiconductor die and its die pad. By including a thermal spreader in an IC package, the package can handle higher levels of power while maintaining approximately the same temperature of the package or can reduce the temperature of the package when operating at the same power level, as compared to a package without a thermal spreader.

Abstract: Tampering with an assembly that includes an integrated circuit is detected by measuring a change in at least one property of a conductive molding formed over at least a portion of the integrated circuit. For example, the conductive molding can be a mixture of resin with conductive powder and/or fibers. The molding can be formed as a continuous region or as strips of conductive material. Conductive contacts are positioned to provide and receive current through portions of the conductive material. For example, the property of the molding can be an impedance of a portion of the conductive molding. A significant change in the impedance measured through one or more conductive contacts indicates tampering with the assembly.

Abstract: Embodiments of the present invention provide systems, devices and methods for detecting the RMS value of a signal. The RMS detector uses multiple variable-gain stages and internal gain control to generate an RMS output signal based on an arbitrary signal input. This RMS detector significantly reduces the signal swings seen on a squarer within prior art RMS detectors and reduces the detector's dependency on DC offsets at low signal levels and overload errors at high signal levels. The embodiments of the present invention also improve the accuracy of the RMS detector within large dynamic signal ranges by obviating the operation of a squarer in saturation or out of the squaring region. Accordingly, embodiments of the present invention are able to more accurately detect RMS values on a signal, operate over relatively higher signal ranges, and better function within different signal modulation schemes, particularly those with large peak-to-average ratios.

Abstract: Embodiments of the present invention provide an optical port that can be configured to support either high speed or low speed optical signals. In particular, these embodiments comprise a switch that defines a data-rate dependent path between the front-end optics of a network node and internal processing electronic modules. As a result, either high speed or low speed pluggable adapters may be inserted within a port and supported by the processing electronic modules.

Abstract: A distributed communication center configured to handle a plurality of communications includes a user zone, a web zone, and a network zone. The user zone includes a plurality of remote terminals that enable communication center personnel and end users to remotely interface with the distributed communication center through the web zone. The web zone includes one or more web servers configured and one or more mail servers to interface the remote terminals in the user zone with the network zone. The network zone includes one or more telephony servers and one or more application servers.

Abstract: A method for encoding video, comprising the steps of (A) encoding a number of frames of a video signal using a first sub-set of encoding parameters, (B) analyzing the encoded frames to find and mark reference frames that are used more than a predetermined number of times, and (C) re-encoding the video signal using a second sub-set of encoding parameters different than the first sub-set of encoding parameters when re-encoding the marked reference frames.

Abstract: A high security microcontroller (such as in a point of sale terminal) includes tamper control circuitry for detecting vulnerability conditions: a write to program memory before the sensitive financial information has been erased, a tamper detect condition, the enabling of a debugger, a power-up condition, an illegal temperature condition, an illegal supply voltage condition, an oscillator fail condition, and a battery removal condition. If the tamper control circuitry detects a vulnerability condition, then the memory where the sensitive financial information could be stored is erased before boot loader operation or debugger operation can be enabled. Upon power-up if a valid image is detected in program memory, then the boot loader is not executed and secure memory is not erased but rather the image is executed. The tamper control circuitry is a hardware state machine that is outside control of user-loaded software and is outside control of the debugger.

Abstract: A package-on-package (POP) secure module includes a first ball grid array (BGA) package and a second BGA package. The first BGA includes an array of bond balls that is disposed on a side of a substrate member, and an array of lands that is disposed on the opposite side of the substrate member. Bond balls of the second BGA are fixed to the lands of the first BGA such that the second BGA is piggy-back mounted to the first BGA. Embedded in the substrate member of the second BGA is an anti-tamper security mesh. An integrated circuit in the first BGA is coupled to, drives and monitors the security mesh. When the module is disposed on a printed circuit board within a point of sale (POS) terminal, the integrated circuit is coupled to, also drives and monitors a second security mesh embedded in the printed circuit board underneath the module.

Abstract: An apparatus, such as a Buck converter system, for generating an output voltage while at the same time monitoring whether an overload or over current condition occurs at the output, and protecting the system if the overload or over current condition occurs. The apparatus includes a first circuit adapted to monotonically change a control voltage from a first voltage (e.g., approximately ground potential) towards a second voltage (e.g., a reference voltage VREF); a second circuit adapted to generate the output voltage based on the control voltage; a third circuit adapted to detect whether a magnitude of an output current exceeds a current threshold; and a fourth circuit adapted to change the control voltage from the second voltage towards the first voltage in response to the third circuit detecting that the magnitude of the output current exceeds the current threshold.

Abstract: Embodiments of the present invention provide a GMPLS fast re-route of packets within a network using a multicast address and a table comprising a list of alias IP addresses. According to various embodiments of the invention an alternate data path from a source node to a destination node allows a packet to traverse to the destination node without IP forwarding techniques being applied. In other words, a tunneling effect from a source node to a destination node allows other nodes in the network to ignore the packet and only read the multicast address within the header and immediately forward the packet to the destination node. A predetermined set of IP addresses are determined from network topology including all potential paths, for a packet to traverse, to a destination address.

Abstract: A package-on-package (POP) secure module includes a BGA mesh cap, a first BGA package, and a second BGA package. The first BGA package includes a first integrated circuit (for example, a microcontroller that includes tamper detect logic). The second BGA package includes a second integrated circuit (for example, a memory). The second BGA package is piggy-back mounted to the first BGA package and the BGA mesh cap is piggy-back mounted to the second BGA package. A printed circuit board substrate member of the BGA mesh cap includes an embedded anti-tamper mesh. This mesh is connected in a protected manner within the module to the first integrated circuit. When the module is in use, a mesh embedded in an underlying printed circuit board is coupled to the BGA cap mesh so that both anti-tamper meshes are controlled by the tamper detect logic.

Abstract: In embodiments of the present invention a device, circuit, and method are described for sampling input signal voltages, which may include voltages below a negative supply voltage for the device or circuit, without requiring static current from the input. Various embodiments of the invention obviate the requirement of an external negative supply voltage or attenuation resistors to allow sampling between a positive and negative voltage range. These embodiments result in a lower power sampling solution as well as simplifying any driver circuitry required by the sampler. The embodiments of the invention may be applied to sampling processes within analog-to-digital converters and may also be applicable to various other types of circuits in which a sampling input having input voltages that are lower than its negative supply voltage.

Abstract: Systems and methods are disclosed that allow for indexing, processing, or both of information from physical media or electronic media, which may be received from a plurality of sources. In embodiments, a document file may be matched using pattern matching methods and may include comparisons with a comparison reference database to improve or accelerate the indexing process. In embodiments, information may be presented to a user as potential matches thereby improving manual indexing processes. In embodiments, one or more additional actions may occur as part of the processing, including without limitation, association additional data with a document file, making observations from the document file, notifying individuals, creating composite messages, and billing events. In an embodiment, data from a document file may be associated with a key word, key phrase, or word frequency value that enables adaptive learning so that unindexed data may be automatically indexed based on user interaction history.

Abstract: An apparatus including a first circuit and a second circuit. The first circuit may be configured to perform image signal processing using encoding related information. The second circuit may be configured to encode image data using image signal processing related information, wherein said first circuit is further configured to pass said image signal processing related information to said second circuit and said second circuit is further configured to pass said encoding related information to said first circuit.

Abstract: A system efficiently expands program memory without extensively modifying the remaining microcontroller architecture. An address bus of N+M bits addresses 2N memory locations in a regular portion of program memory and additional memory locations in an expanded portion. An N-bit program counter increments through instructions stored only in the regular portion. Constants are stored in both the regular and expanded portions. An M-bit page-designator is prepended to an N-bit operand to generate a memory address of N+M bits. Program memory is expanded only when a load instruction retrieves constants from program memory. The page-designator is toggled when an N-bit operand rolls over upon incrementing by the load instruction. A block of constants straddling the boundary between the regular and expanded portions can be retrieved from program memory by executing only the load instruction. When program instructions are executed that do not retrieve constants, a fixed page-designator designates the regular portion.