Patents Represented by Attorney, Agent or Law Firm Robert C. Kowert
  • Patent number: 7100115
    Abstract: A method of managing context-sensitive help data for a computer system includes displaying a plurality of program components to a user for interaction, and retrieving from a first memory area having a first access time first help data corresponding to a first of the components, where the first component is not interacted with by the user. Then store the first help data in a second memory area having a second access time less than the first access time. Subsequent to storing the first help data, determine whether the user has interacted with the first component, and responsive to the determination, retrieve the first help data from the second memory area and display the first help data to the user.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: August 29, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Robert A. Yennaco
  • Patent number: 6925056
    Abstract: A routing scheme using intention packets is contemplated. At times, one or more switching devices within a network may become overloaded with traffic or may encounter other adverse transmission conditions. When this occurs, a switching device may drop one or more packets to alleviate some of the congestion or other adverse condition. The switching devices may support a particular amount of resources (e.g. bandwidth, buffers, etc.) in and out of each of their ports. When a packet or a header portion of a packet arrives at a switching device, the switching device may determine what port the packet will need and the amount resources required by the packet on that port. If the required resources available for the packet on the port, then the switching device may route the packet to a next device. If the required resources are not available for the packet on the port, then the switching device may drop at least a portion of the packet. As opposed to or in addition to congestion (e.g.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: August 2, 2005
    Assignee: Sun Microsystems, Inc.
    Inventor: Whay S. Lee
  • Patent number: 6826148
    Abstract: An apparatus and method for implementing a transmission scheme employing intention is contemplated. At times, a switching device within a network may detect a fault, corruption, or congestion. When a switching device detects a fault, corruption, or congestion, it may drop one or more packets to resolve the fault, corruption or congestion. When a packet is dropped, the switching device that dropped it may create an intention, packet that corresponds to the dropped packet. The switching device may then route the intention packet to the destination device specified by the dropped packet. The intention packet may be routed along a different route than the original route specified by the dropped packet. The intention packet may be much smaller than the dropped packet and may include parts of a portion of the dropped packet. The intention packet may also record the route it takes to get to the destination device.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: November 30, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Whay S. Lee
  • Patent number: 6823435
    Abstract: A non-volatile memory system is presented having a boot code section, wherein the size of the boot code section may be programmably selected. One embodiment of the non-volatile memory system includes a memory array, a logic unit, a control unit, and a program store. The memory array includes multiple non-volatile memory cells (e.g., flash EEPROM cells). The memory array is divided into memory blocks of equal size. A number of the memory blocks are allocated for boot code storage, forming a boot code section of the memory array. The control unit controls storage of data within and retrieval of data from the memory array. The control unit includes a configuration register having a boot code section size field. The contents of the boot code section size field determine the number of memory blocks making up the boot code section. The logic unit is coupled between the control unit and the memory array, and receives address, data, and control signals from an external source.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: November 23, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Michael T. Wisor
  • Patent number: 6823504
    Abstract: A JavaScript interpreter may be interfaced with a JavaScript library of host objects implemented in Java. A JavaScript program may be accessed and parsed, an intermediate representation of the program may be generated, and the intermediate representation may be executed by interfacing with the library of host objects. In one embodiment, the JavaScript program is embedded in HTML documents in a Web browser. The browser is programmed to intercept the JavaScript code and pass execution control to an interpreter engine implemented in Java. The interpreter engine may access the program's library of host objects through an interface to the library and execute the intermediate representation to produce the desired results as programmed in the original JavaScript source program. The implementation of the interface enables the implementation of the interpreter engine to be independent from the implementation of the library of host objects and independent from the implementation of the browser.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: November 23, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Stepan B. Sokolov
  • Patent number: 6813688
    Abstract: A system may include mirroring logic, a controller, and first and second devices (e.g., data storage devices). The first and second devices may include multiple registers. The mirroring logic may be configured in a first mode wherein the mirroring logic allows the registers of the first device to be accessed from the controller and prevents the registers of the second device from being accessed from the controller. The mirroring logic may be configured in a second mode wherein the mirroring logic allows the registers of the second device to be accessed from the controller and prevents the registers of the first device from being accessed. The first and second devices may be configured via the mirroring logic such that the first and second devices are selected simultaneously. When selected simultaneously, the first and second devices may carry out a subsequently issued command substantially simultaneously.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: November 2, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Chia Y. Wu, Whay S. Lee, Nisha D. Talagala
  • Patent number: 6798956
    Abstract: Networks may include optical cables to transmit data between various devices in the network. Indicators positioned on or within optical cables may be used to identify cables that have been compromised during installation, movement and/or use of the cables. Indicators may reduce a network downtime by decreasing the time needed to identify compromised cables. In some embodiments, indicators may change color and/or emit light to indicate that an optical cable has been compromised.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: September 28, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: John M. Morrison
  • Patent number: 6798650
    Abstract: A bracket having two parallel sides and an interconnecting crosspiece is attached to a disk drive or similar peripheral with the sides of the bracket extending longitudinally of the sides of the drive and the crosspiece extending across the front of the drive. A chassis of a computer or the like has internal parallel sides formed with horizontal guides to receive the bracket, a substantially open front face and an internal connector engageable with a mating connector on the rear of the drive when the bracket is fully inserted in the chassis. The sides of the bracket have features to protect the drive from horizontal and vertical vibrations. A handle is pivoted to the crosspiece near one end moveable between at least three positions: a first or latched position parallel to the crosspiece, a second position swinging out at about a 15° angle and a third position at about a 45° angle.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: September 28, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Naum Reznikov, Michael F. McCormick, Jr., Ehsan Ettehadieh, Daniel Hruska, Anthony N. Eberhardt
  • Patent number: 6795850
    Abstract: Each node's memory controller may be configured to send and receive messages on a dedicated memory-to-memory interconnect according to the communication protocol and to responsively perform memory accesses in a local memory. The type of message sent on the interconnect may depend on which memory region is targeted by a memory access request local to the sending node. If certain regions are targeted locally, a memory controller may delay performance of a local memory access until the memory access has been performed remotely. Remote nodes may confirm performance of the remote memory accesses via the memory-to-memory interconnect.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: September 21, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Chia Y. Wu, John D. Acton
  • Patent number: 6795937
    Abstract: To provide efficient resource access control in a computer system, a trap handler for handling a trap in the event of a faulty resource access being detected is arranged to define a diversion for subsequent access attempts to the same resource. An address translation mechanism is responsive to indication of a diversion for a resource access to modify an address mapping, whereby subsequent attempts to access the resource are diverted in accordance with the diversion. The trap handler can be arranged in a conventional manner to process an exception of the first faulty access to the resource. However, by defining the diversion, which can be used to map further attempts to access the same resource, unnecessary exception processing can be avoided.
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: September 21, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Jeremy Graham Harris, Paul Durrant
  • Patent number: 6792466
    Abstract: In a distributed computing environment, a message gate may be the message endpoint for a client or service to communicate with another client or service. Devices may have a gate factory (e.g. message endpoint constructor) that is trusted code on the device for generating gates based on XML message descriptions. The use of the gate factory may ensure that the gate it generates is also trusted code, and that the code is correct with respect to a service advertisement. A service advertisement may indicate, for a particular service, a message schema, service URI and authentication service URI. In one embodiment, the pieces the gate factory needs to construct a gate are the XML schema of the service and the URI of the service. In another embodiment, an authentication credential may also be obtained and used in gate construction by running an authentication service specified in the service advertisement.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: September 14, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Thomas E. Saulpaugh, Gregory L. Slaughter, Bernard A. Traversat, Eric Pouyoul
  • Patent number: 6789126
    Abstract: A message gate is the message endpoint for a client or service in a distributed computing environment. A message gate may provide a secure message endpoint that sends and receives type-safe messages. A gate may have a gate name that is a unique ID that refers only to the gate. In one embodiment, a gate is assigned a gate name when the gate is created and the gate name refers to only that gate for the life of the gate. A gate may be addressed using its gate name. The name may allow clients and services to migrate about the network and still work together. In a preferred embodiment, the gate address is independent of the physical message transport address and/or socket layer. Thus, a gate name may provide a virtual message endpoint address that may be bound and un-bound to a message transport address.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: September 7, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Thomas E. Saulpaugh, Gregory L. Slaughter, Eric Pouyoul
  • Patent number: 6789077
    Abstract: A system and method for searching for Internet-based repositories within a distributed computing environment are provided. A client on a device may interact with a search service on the same or a different device to find spaces (i.e., network-accessible XML object repositories) for storage and/or retrieval of data. The client may send an XML search request to the search service. The search request may include one or more desired characteristics, such as keywords, which are sought of a space. Based upon the search request, the search service may generate search results including locations (e.g., URIs) of one or more resulting spaces. The spaces may include web pages. In generating the search results, the search service may interact with a network-accessible third-party search engine, such as a browser-accessible search engine. The search service may obtain a service advertisement for each of the resulting spaces. Each service advertisement includes information which is usable to access the respective space.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: September 7, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Gregory L. Slaughter, Thomas E. Saulpaugh, Bernard A. Traversat, Mohamed M. Abdelaziz
  • Patent number: 6789162
    Abstract: A storage device controller configured for coupling to a storage device (e.g., a hard disk drive) having a multiple locations for storing data. The controller is coupled to receive a WRITE ANYWHERE command including write data. Unlike a conventional write command, the WRITE ANYWHERE command does not specify a location of the storage device where the write data is to be stored. The controller responds to the WRITE ANYWHERE command by: (i) selecting one or more unused locations of the storage device, and (ii) writing the write data to the storage device, wherein the writing of the write data includes directing the storage device to store the write data in the one or more unused locations of the storage device. At least a portion of the write data in stored in each of the one or more unused locations. The controller may be coupled to receive the WRITE ANYWHERE command from a host configured to track usage of the locations of the storage device.
    Type: Grant
    Filed: October 17, 2000
    Date of Patent: September 7, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Nisha D. Talagala, Chia Y. Wu, Whay S. Lee
  • Patent number: 6785686
    Abstract: Role is a comprehensive grouping mechanism. In a client-server directory system, roles transfer some of the complexity to the directory server. A role is defined by its role definition entry. Any client with appropriate access privileges can discover, identify and examine any role definition. A “managed” role is one that can be configured to provide search results similar to those available with a static grouping mechanism, i.e., to create a group entry that contains a list of members. Managed roles allow a user to create an explicit enumerated list of members. A managed role is a label stored with a directory entry.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: August 31, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: David Boreham, Peter Rowley, Mark C. Smith
  • Patent number: 6778809
    Abstract: A system and method for transmitting and receiving data in a mobile communications network. The system includes one or more mobile station for transmitting data in a mobile digital network. The mobile stations are configured to act as buffer/repeaters by storing and forwarding data signals until they are received by a designated destination station. The mobile stations include an antenna, a transceiver coupled to the antenna, a processor coupled to the transceiver, a data storage memory coupled to the processor, and a power supply. The processor may be configured to cause the transceiver to broadcast interrogation signals to determine whether other mobile or base stations are present for store-forwarding.
    Type: Grant
    Filed: April 3, 2001
    Date of Patent: August 17, 2004
    Inventor: Nobuyoshi Morimoto
  • Patent number: 6775749
    Abstract: A computer system may include several caches that are each coupled to receive data from a shared memory. A cache coherency mechanism may be configured to receive a cache fill request, and in response, to send a probe to determine whether any of the other caches contain a copy of the requested data. Some time after sending the probe, the cache controller may provide a speculative response to the cache fill request to the requesting device. By delaying providing the speculative response until some time after the probes are sent, it may become more likely that the responses to the probes will be received in time to validate the speculative response.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: August 10, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Dan S. Mudgett, Mark T. Fox
  • Patent number: 6766222
    Abstract: A system and method are presented for sequentially applying electrical power to multiple loads. The system is capable of operating in conjunction with other such systems as either a slave or master. When operating as a master, the system is activated as soon as it is turned on, and begins sequentially applying power to the loads connected to its output channels. When operating as a slave, the system must first receive an enable input signal from the master to which it is connected. The master/slave assignment is switch-selectable; thus, series-connected units may be reconfigured from single to multiple masters, or vice-versa, with no wiring changes. The new system is believed to provide the benefits of improved reliability and reduced cost for power distribution networks, by eliminating startup current surges resulting from simultaneously powering-up all of the attached loads, thereby reducing stress on components.
    Type: Grant
    Filed: June 14, 2000
    Date of Patent: July 20, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Raymond S. Duley
  • Patent number: 6766347
    Abstract: A computer system includes a real-time interrupt that causes the operating system to determine which isochronous tasks are pending. In one embodiment, applications that include isochronous tasks are certified to be well-behaved and the operating system will only initiate applications that are known to be well-behaved by checking a list of certified applications. The operating system will not initiate an application if insufficient resources are available for executing the tasks of the application. Each application informs the operating system of an execution rate and a maximum duration of its isochronous tasks. Prior to initiating an application, the operating system verifies that resources are available to execute the isochronous tasks of the application. The operating system includes a non-maskable interrupt to terminate isochronous tasks. Termination may be necessary if an isochronous task fails to execute within its specified maximum duration.
    Type: Grant
    Filed: June 9, 1998
    Date of Patent: July 20, 2004
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Dale E. Gulick
  • Patent number: 6763440
    Abstract: A method and system for garbage collecting a virtual heap using nursery regions for newly created objects to reduce flushing of objects from an in-memory heap to a store heap is provided. The garbage collection method is suited for use with small consumer and appliance devices that have a small amount of memory and may be using flash devices as persistent storage. The garbage collection method may provide good performance where only a portion of the virtual heap may be cached in the physical heap. The virtual heap may use a single address space for both objects in the store and the in-memory heap. In one embodiment, a single garbage collector is run on the virtual heap address space. The garbage collection method may remove non-referenced objects from the virtual heap. The garbage collection method may also include a compaction phase to reduce or eliminate fragmentation, and to improve locality of objects within the virtual heap.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: July 13, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Bernard A. Traversat, Michael J. Duigou, Thomas E. Saulpaugh, Gregory L. Slaughter