Abstract: An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.

Abstract: An apparatus for use with a percussion instrument assembly includes a base unit for positioning on a preselected surface. A first instrument pedal includes a first connecting linkage having a first end and a second end. The first end of the first connecting linkage is linked to the base unit so that the first instrument pedal may be utilized to operated a first percussion instrument. A second instrument pedal is positioned adjacent the first instrument pedal. The second instrument pedal includes a second connecting linkage having a first end and a second end. The first end of the second connecting linkage is linked to the base unit so that the second instrument pedal may be utilized to operate a second percussion instrument in a manner such that the first and second pedals are capable of being alternately actuated independently and simultaneously by the foot of an operator to respectively activate one or both the first and second percussion instruments.

Abstract: An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in select stages and are responsive to a recognized control token for reconfiguring such stages to handle an identified DATA Token. A wide variety of unique supporting subsystems circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.

Abstract: A multi-standard video decompression apparatus has a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system.

Abstract: An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.

Abstract: A configurable RAM interface connecting a bus to RAM is adapted to receiving large multiword variable length tokens at a high data arrival rate, using a swing buffer and a buffer manager. An address source provides complete addresses to the interface. The buffer manager has a state machine which transitions among a plurality of states, maintaining status information about the buffers, allocating the buffers for reference by a write address generator, clearing the buffers for occupation by subsequently arriving data, and maintaining status information concerning the buffers. The buffer manager also examines tokens of received data in order to update the status of the arrival buffer.

Abstract: A multi-standard video decompression apparatus has a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system.

Abstract: An apparatus for the suppression of electromagnetic emissions from an electronic device. The apparatus includes a die cast metallic container having a continuous wall, a shoulder formed on the continuous wall, a plurality of rounded corners, and a neck portion. The neck portion and shoulder mate with a deep drawn metallic cap. A source of electromagnetic emissions is disposed in the interior space defined by the container and the cap, and a flex strip source passes through a groove formed in an external wall of the container to supply the source. The container is adapted for use in an optical disc system and provides a mount for a semiconductor laser modulated at a radio frequency on the order of 450 MHz. The container also holds auxiliary electronics. A conductive tape seals the assembly so that electromagnetic emissions of the laser are confined within the interior space.

Abstract: The present invention relates to a quickly releasable removably engaged light source for use with a display shelf. A shortened display shelf having a top and bottom, a front and a back edge is mounted to a wall such as the back edge of the display shelf has an air-gap between it and the surface to which it is mounted. A removable light support member is releasably engaged with the back edge of the shelf. On the back of the light support member, there is a light attached thereon. The distance between the back of the removable light support and the surface to which the shelf is mounted is such that an air-gap is created between them so that the quickly releasable support member and attached light can be removed from the shelf without the light on the back of the removable light support member hitting the surface.

Abstract: A CMOS Reed-Solomon decoding circuit calculates syndromes, executes a Berlekamp algorithm, performs a Chien Search, and corrects a delayed version of the received data according to a calculated magnitude of error. The circuit is optimized in terms of chip territory and circuit complexity. Signals are provided to indicate uncorrectable packet errors and other transmission errors.

Abstract: A pipeline structure processes data in a series of stages, each of which has a data input latch (LDIN) and passes it on to the next stage in the pipeline via a data output latch (LDOUT). The stages are preferably connected to two non-overlapping clock phases (PH0, PH1). Adjacent stages are also connected via a validation line (IN.sub.-- VALID, OUT.sub.-- VALID) and an acceptance line (IN.sub.-- ACCEPT, OUT.sub.-- ACCEPT), and in some embodiments also via an extension bit line (IN.sub.-- EXTN, OUT.sub.-- EXTN). Input data is transferred from any stage to the following device on every complete period of both clock signals only if both the validation and acceptance signals in the respective latch are in an affirmative state, whereby data is transferred between stages regardless of the state of the validation and acceptance signals in other stages. A two-wire interface is thus formed between the stages.

Abstract: An apparatus and method for retrieving densely stored data from various types of magnetic media. A medium is scanned to provide an input signal. The input signal is conditioned through differentiation, equalization and partial integration. Positive and negative signal peak detectors are connected to the conditioned signal, and a threshold signal is generating corresponding to an average or midpoint of the measured positive and negative signal peaks. An output signal is generated by comparing the conditioned signal and the threshold signal. The DC component of the input signal is accounted for by feeding back the output signal and adjusting the threshold signal based on the duty cycle of the output signal.

Abstract: The present invention allows the light beam of an optical disc storage device to radially move between different information tracks of an optical disc while the storage device tracking servo loop remains in a continuous closed loop mode of operation. The invention operates to radially move a light beam from one information track to another during a closed loop mode of operation by activating two control signals introduced into the closed tracking servo loop to create a phantom track center that radially moves across the optical disc. Because the tracking servo loop is in a closed loop mode of operation, the tracking servo operates to keep the light beam centered on the point that the tracking servo considers to be the center of an information track; in this case the phantom track center. Therefore, the tracking servo causes the light beam to radially move across the disc in a closed loop mode of operation by keeping the light beam centered on the moving phantom track center.

Abstract: A multi-standard video decompression apparatus has a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system.

Abstract: A laser driver for controlling an electrical current supplied to a laser in an optical disc system. The laser driver includes pass transistors for delivering electrical current to the laser, an operational amplifier for setting a reference voltage on the bases of the pass transistors, and a CMOS buffer for applying a drive voltage to emitter circuits of the pass transistors. The drive voltage has a first voltage level and a second voltage level, and the electrical current is supplied to the emitter circuits only when the drive voltage is at the first voltage level. The laser driver further includes a switch for switching the drive voltage between the first voltage level and the second voltage level so that electrical power is consumed only when the laser is energized and enhanced rise and fall switching characteristics are thereby achieved.

Abstract: An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.

Abstract: A servo control system for an optical information storage device includes an optical detector for detecting information stored on an information storage media and for detecting a servo error signal. The optical detector provides a sum information signal output and at least one servo error signal output. A motor is provided for positioning the optical detector relative to the information storage media. An analog to digital converter receives the sum information signal output and the servo error signal output to thereby output a digital servo error signal at a predetermined sampling rate. The digital servo error signal is normalized to the sum information signal by the analog to digital converter. A digital signal processor for processing the digital servo error signal and outputting a servo control signal is provided. The digital signal processor includes a digital servo compensation transfer function for producing the servo control signal.

Abstract: This invention provides a method to control the buffering of encoded video data organized as frames or fields. This method involves determining the picture number of each incoming decoded frame, determining the expected presentation number at any time and marking any buffer as ready when its picture number is on or after the presentation number.

Abstract: A first write encoder encodes digital data in a first, high-density format. A second write encoder encodes digital data in a second, low-density (i.e., ANSI) format. A first read decoder decodes digital data from the first format. A second read decoder decodes digital data from the second format. A disk drive receives a replaceable 90 millimeter optical disk. A read/write head reads encoded data from and writes encoded data to a 90 millimeter optical disk received by the drive. In a first mode, the first write encoder is connected between a source of digital data and the read/write head, and the first read decoder is connected between the read/write head and the utilizing apparatus. In a second mode, the second write encoder is connected between the source and the read/write head, and the second read decoder is connected between the read/write head and the utilizing apparatus.

Abstract: A multi-standard video decompression apparatus has a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system.