Abstract: A system for characterizing objects to be sorted in real time and making sorting decisions using lasers to excite fluorescing dyes used to tag objects such as cells which flow through the laser beam in a stream of conductive fluid. The scattered light and fluorescent light at various frequencies define a multidimensional space. These light characteristics are sensed and digitized. The data so gathered is buffered and then compared to a binary classification tree. The individual parameters cause a certain path through the binary decision tree to be taken while the cell is passing from the point in the stream where the light characteristics are gathered to a point where electrostatically charged electrodes deflect individual statically charged drops containing cells to be sorted into various sorting bins. When the decision tree has been traversed, the sorting decision for the drop containing the cell which had those parameters is done.

Abstract: A millimeter-wave active probe for use in injecting signals with frequencies above 50GHz to millimeter-wave and ultrafast devices and integrated circuits including a substrate upon which a frequency multiplier consisting of filter sections and impedance matching sections are fabricated in uniplanar transmission line format. A coaxial input and uniplanar 50 ohm transmission line couple an approximately 20 GHz input signal to a low pass filter which rolls off at approximately 25 GHz. An input impedance matching section couples the energy from the low pass filter to a pair of matched, antiparallel beam lead diodes. These diodes generate odd-numberd harmonics which are coupled out of the diodes by an output impedance matching network and bandpass filter which suppresses the fundamental and third harmonics and selects the fifth harmonic for presentation at an output.

Abstract: A system for controlling an electromechanical system comprised of a number of electromechanical devices such as solenoid operated valves, motor, relay and other devices. The control systems is comprised of a central processing unit and control software plus suitable interface circuitry to convert the digital data from the central processing unit into suitable control signal to operate the elecromechanical devices. The control software is characterized by the ability to allow users to either select preprogrammed sequences of commands to be executed by the computer or to program unique sequence at either of two levels of complexity.

Abstract: There is disclosed herein an automated sample preparation system for chemical assay of samples of materials. The sample preparation system includes a sample preparation chamber which includes a removable cup for taking to the location of solid or very viscous samples. The cup may be attached in sealing relationship to a cap through which extends various utilities such as a mixer/grinder to grind solid samples and mix non-homogeneous samples, a fill pipe to pump in liquid samples, an effluent pipe in the sump of the cup to allow pump of samples and solvents and a nozzle to allow liquids to be sprayed against the walls. A sample metering valve associated with the sample preparation chamber allows a known volume of sample to be isolated so that solvent may be pumped in to dilute the sample to a user defined concentration.

Abstract: There is disclosed herein a modular, high power, flyback transformer based power supply with step up and step down capability. The power supply uses multiple flyback transformers having switching transistors which may be either connected to one terminal of the primary winding or which may be placed in the center of the primary winding. The switching transistors are driven by pulse trains which are out of phase with each other. This results in lowered RMS values for ripple current through the input and output capacitors. The flyback voltage transients may be used to step up or step down the input voltage by varying the pulse width of the pulses in the switching pulse trains. In embodiments where the switching transistors are placed in the middle of the primary windings, better suppression of radio frequency emissions and current in safety ground wires is achieved.

Abstract: A memory cell and array of memory cells specially adapted for support of bit serial math for low cost CAD workstations. The memory cell is comprised of a multiplexer which selects between several inputs for application of data to a bit storage cell of a dynamic RAM nature. Each cell multiplexer has a serial data input, a parallel data input, a parallel format pipeline data input and a recirculation data input. Each cell also has a first output which serves both as a serial data output and a pipeline data output, and a second data output which is tri-state and which is coupled to a parallel format data bus which runs through the array. A plurality of such cells are arranged in rows and columns where rows of such cells are coupled so that data may passed between the rows in either parallel format or serial format for pipeline operations and such each row can independently load data in either serial or parallel format and output data in either parallel or serial format.

Abstract: The system uses a tunable inductor in series with the piezoelectric crystal excitation transducer in the probe which has a flux modulation coil. The bias current through this flux modulation coil is controlled by the system. It is controlled such that the inductance of the tunable inductor cancels out the capacitive reactance of the load impedance presented by the probe when the probe is being driven by a driving signal which matches the mechanical resonance frequency of the probe. The resulting overall load impedance is substantially purely resistive. The system measures the phase angle and monitors the power level. The system uses this information to adjust the bias current flowing through the flux modulation coil to maintain the substantially purely resistive load impedance for changing power levels. This information is also used to adjust the frequency of the driving signal to track changing mechanical resonance conditions for the probe at different power levels.

Abstract: A driver system for an ultrasonic probe using a tunable inductor in series with the piezoelectric crystal excitation transducer in the probe. The bias current through this flux moduation coil is controlled by the system such that the inductance of the tunable inductor cancels out the capacitive reactance of the load impedance presented by the probe when the probe is being driven by a driving signal which matches the mechanical resonance frequency of the probe. The resulting overall load impedance is substantially purely resistive. The system also adjusts the frequency of the driving signal to track changing mechanical resonance conditions for the probe at different power levels. This method of operation insures substantially maximum power transfer efficiency and substantially linear power control over a range of power dissipation levels.

Abstract: The two levels of programming complexity include a high level and an expert level. The command set on the high level includes a plurality of commands which comprise sequences of more detailed commands from the expert level. The expert level commands comprise single actions or operations, or small groups of operations, to be performed by the electromechanical devices, such as valve openings or closures. User access privileges are definable by a system manager to restrict different classes of users to one or more of the levels of complexity.

Abstract: A pressure regulator integrated in a sandwich of pyrex and silicon wafers. A first integrated valve comprising a silicon wafer in which there is etched a cavity so as to leave a flexible membrane of silicon is sandwiched between two other wafers which are usually pyrex. One of the pyrex wafers has a resistor pattern etched thereon in a location such that the resistor pattern is enclosed by the walls of the cavity when the pyrex wafer is bonded to the silicon wafer. The other pyrex wafer has a valve seat etched adjacent to the membrane in the silicon wafer. The cavity is filled with a fluid which, when heated, raises the vapor pressure in the cavity so as to cause the membrane to flex and change the spacing between the membrane and the valve seat thereby regulating flow. A second integrated valve has the same structure. One of these valves is coupled to a high pressure source and the other is coupled to a low pressure sink.

Abstract: A method and apparatus for increasing the throughput of memory disk drive quality control testing. The apparatus consists of a delay line for delaying the input signal from the read circuitry by one period of said input signal. A difference amplifier subtracts the delayed input signal from the undelayed input signal and couples the difference to one input of a comparator. The comparator compares the difference signal to a threshold used to indicate the presence of an "additional pulse". This test is performed simultaneously with a "missing pulse" test. The method involves delaying the input signal by one period and subtracting the delayed signal from the undelayed signal. A comparison of the difference to a predetermined threshold is then performed and where the threshold is exceeded, the corresponding location on the track under test is recorded as a probable defect. This method is performed simultaneously with a conventional method of performing a "missing pulse" test.

Abstract: An integrated scanning tunneling microscope and an integrated piezoelectric transducer and methods for making both. The device consists of one or two arm piezoelectric bimorph cantilevers formed by micromachining using standard integrated circuit processing steps. These cantilevers are attached to the substrate at one area and are free to move under the influence of piezoelectric forces which are caused by the application of appropriate voltages generated by control circuitry and applied to pairs of electrodes formed as an integral part of the bimorph cantilever structure. The electric fields caused by the control voltages cause the piezoelectric bimorphs to move in any desired fashion within ranges determined by the design. The bimorph cantilevers have tips with very sharp points formed thereon which are moved by the action of the control circuit and the piezoelectric bimorphs so to stay within a very small distance of a conducting surface.

Abstract: There is disclosed a sample and hold circuit using a four diode bridge using a voltage source and a bridge and a storage capacitor and the voltage source to be sampled coupled to the other two opposite nodes of the bridge. Switches in the lines coupling the voltage and current sources to the bridge control whether the sample and hold circuit is sampling data or holding the sampled voltage. This arrangement is characterized by extremely low sample voltage acquisition time.

Abstract: A host computer controls a plate reader which optically reads the results between donor samples and reagents. The system provides the user with the ability to change the position of off-center light absorbance readings to maximize the power of the machine to discriminate between positive and negative agglutination reactions. In addition, the user can tailor thresholds for absorbances used to distinguish between positive, negative and "no type determined" reactions.

Abstract: An electronic still store system stores and selectively outputs video image data defining a plurality of signal frame still images. The simultaneous display of up to 16 or more quarter sized images for scanning or sorting by an operator is facilitated by generating a quarter sized copy of each newly received image frame and storing both together on a conventional magnetic disk storage device as is typically employed in general purpose digital computing systems. The quarter sized image can then be recalled directly for a multi-image scan or sort function in which 16 reduced size images are displayed simultaneously without the time delays associated with the retrieval and size reduction of 16 full size images.

Abstract: There is disclosed herein a system for digitally forming synchronization signals. In the preferred embodiment, these synchronization signals are for substitution in place of the original synchronization signals in a television signal. These digitally generated synchronization signals are generated synchronously with the digitization of the video portions of the television signal, and the digitally generated synchronization signals are multiplexed into the stream of digital video data in the appropriate blanking intervals. The system uses a first digital signal number generator to generate a plurality of digital signals which represent the peak amplitudes of the desired synchronization signals. A second digital signal number generator synchronously generates a second plurality of digital signal values representative of the shape of the desired edges for the synchronization signal being generated.

Abstract: There is disclosed herein an interface for a peripheral to allow the peripheral to communicate with either synchronous or asynchronous systems. The interface includes a series of flip-flops coupled in a chain to take the combined data strobe and chip select signals from an asynchronous system such as a microprocessor and synchronize the combined signal with the peripheral clock and convert the signal to a pulse. This pulse then emulates the instruction enable pulse received from synchronous microprogrammed systems. If the peripheral is operating in a synchronous sytem, the instruction enable signal from the system is gated through a multiplexer controlled by a mode signal which indicates which mode is active so as to act as the peripheral instruction enable signal. An AND gate gates one bit of the instruction bus with the ANDed chip select and data strobe signals to create a read/write control signal for internal use in controlling the data bus drivers.

Abstract: A modified Booth algorithm is implemented in the arithmetic logic of the ALU data path to cut the number of cycles to do a multiply in half thereby improving execution time of the multiplication operation. A Booth Encoder examines the two least significant bits of the multiplier stored in the Q2 register and the bit which was previously shifted out on the last partial product shift cycle. Based upon the status of these three bits, the Booth Encoder causes the ALU to add or substract one times the multiplicand to the contents of the partial product register and shift twice, add or substract two times the multiplicand to the contents of the partial product register and shift twice, or do nothing but shift twice. A pre ALU B shifter provides a single left shift of the multiplicand to provide the multiplication by two when same is necessary.

Abstract: There is disclosed herein a servo data decoder which can decode both quadrature and non quadrature servo data. The decoder is comprised of a servo data amplitude demodulator to generate position error signals and a position error signal processor to generate a GPES signal to serve as a position error signal during the track following mode and a velocity signal and a track crossing signal for use in the seek mode. The user system may have either single or double pulse sync, and double pulse sync spacing, pulse window time and sync to first data pulse delay are user definable. The user may adjust the gain of the system in two manners and may program the frequency response characteristics of the phase locked loop. Many other user definable or user alterable features are provided.

Abstract: There is disclosed herein a CRC calculation circuit which can calculate CRC checkbits on 8 bits of raw input data per cycle of a byte clock. The calculation apparatus uses 8 rows of shifting links with the inputs of each row coupled to the data outputs of the preceding row. Each shifting link shifts its input bit one bit position toward the most significant bit, and selected shifting links perform an exclusive OR operation between their input bits and the output of an input exclusive-OR gate which exclusive-OR's one input bit with one of the bits in the most significant byte of the checksum register. A byte wide output bus is used to access the final checkbits from the checksum register by disabling the array of shifting links during the output cycles so that the bytes of CRC data can be shifted into position through the array one byte per each cycle of the byte clock.