Abstract: A line driver circuit, an electro-optic device, and a display apparatus efficiently reduce cost by reducing process dimensions and effectively shorten display panel development turn-around time by simplifying the reconfiguration of output voltages. The liquid crystal apparatus 10 has an LCD panel 20, a signal driver 30, a scan driver 50, and a power supply circuit 80, each of which is controlled by an LCD controller 60. Signal driver 30 contains an interface unit 200 for converting a first voltage specified for a low voltage process to a second voltage specified for a high voltage process. The interface circuitry within interface unit 200 is made up devices using a medium voltage process. Interface unit 200 receives and converts low voltage signals (i.e. first voltage level) supplied from LCD controller 60 to high voltage signals (i.e. second voltage level), and supplies the level-shifted voltage signal to scan driver 50 or power supply circuit 80.

Abstract: An internet accessible server permits access management to remote printing devices by remote users. Only users having printing access to a target remote printing device may submit a print job for printing on the target remote printing device. Users having printing access permission are further divided into owner status and user status. Owner status user of a remote printing device may grant or revoke the printing permission of non-owner status users. At least one owner status user is designated a super-owner, and can grant and revoke the owner status of other users. The super-owner user may relinquish its super-owner status to any other user. After submitting a print job for a target printing device, the print job is stored in a storage space on the Internet and is transferred to the target printing device only when the target printing device itself downloads the print job using standard internet protocols similar to those used in the downloading of a web page.

Abstract: A printer 10 has a reception unit 28 for receiving print commands from a host 12, and has print heads 64, 66 capable of printing multiple colors. A data processing part 24 applies a specific colorization process according to a print command received by a reception unit 28 and generates color print data for printing multiple colors. The content of a colorization process is determined by colorization information stored in a colorization information storage unit 62. The colorization information is set by a data configuration unit 26 according to a color setup command from the host 12.

Abstract: A series of approved printers is associated with each of multiples utilities. A client user having a local printer must first identify the local printer as one of the approved printers. The client user may then gain access to the utilities having an association with the local printer. The utilities have access to multiple image sets. Each image set includes a thumbnail representation for quick selection, a screen representation for editing the image, and a printer representation for printing the image. The printer representation is of higher resolution than the screen representation, and the screen representation is of higher resolution than the thumbnail representation. Each utility is further associated with list of predefined, and unalterably, printer setting. When a print option is actuated, the utility conveys a list of predefined printer settings to a printer without requiring the client user to submit any printer preferences.

Abstract: A frequency synthesizer, for integration in a low voltage digital CMOS process, controls a VCO using a dual loop structure including an analog loop and a digital loop. The digital loop includes an all digital frequency detector, which controls a center frequency of the VCO. The analog loop includes an analog phase detector and charge pump, which add phase coherence to the frequency controlled loop. The analog loop reduces the noise of the digital logic and VCO, and the digital control provides frequency holdover and very low bandwidth. The bandwidth of the digital loop is made smaller than the bandwidth of analog loop, and is preferably 200 times smaller. This parametric difference allows two separate control inputs to the VCO, one from the analog loop and one from the digital loop, with both inputs functioning relatively independently of each other.

Abstract: The capacitive loading effects of an ESD circuit having an electrostatic-protection diode are reduced by using a capacitance compensation circuit. Under normal operation when no electrostatic discharge is experienced, the capacitance reduction circuit maintains a reverse bias across the electrostatic-protection diode, which causes the diode's capacitance to be reduced below a predetermined value. When an electrostatic discharged is experienced, the capacitance compensation circuit removes the applied reverse bias, and shunts the electrostatic-protection diode to a power rail.

Abstract: The use of a bus clock is eliminated in communication between a cpu, or mpu, and a register block. The communication between the cpu/mpu and the register block is made combinatorial, such that the cpu/mpu does not require any acknowledge or wait signal from the register block to know when to proceed with a requested write operation. The register block has both a write request input and a read request input, each of which is separately actuated to initiate a write operation or read operation, respectively. The cpu/mpu initiates a write operation by actuating the write request input while maintaining the read request input negated. The register block responds to actuation of its write request input by getting ready for initiate the requested write operation, and waiting for a signal letting it know if the requested operation is a valid write operation. If the requested write operation is deemed valid, then the register block executes the requested write operation only upon the negation of the write request.

Abstract: A logo generating system and method allow a user to specify colors and adjust an image according to the particular printing purpose. Source data of image elements with two or more colors is obtained and displayed so that the user can view an image of the source data while freely adjusting the colors of the logo data according to the colors that can be used by the printer. The source data is processed and output according to the input parameters as the colors are assigned. An image of the data processed according to the color assignments is also displayed so that the user can adjust the color assignments while viewing the effect on the actual data.

Abstract: An electronic watch in which the display on a liquid crystal display 236 is prohibited when the detected output voltage of a secondary battery 220 drops to a first predefined voltage. An initialization process is performed when the detected voltage of the secondary battery 220 drops to a second voltage lower than the first voltage, and the display on the liquid crystal display unit 236 is restarted when the detected voltage of the secondary battery 220 rises to a third voltage not lower than the first voltage after having reached the second voltage.

Abstract: The appearance of edges in an image is improved through precise placement of subpixels within pixel cells that are located on or near edges in an image. Image data is examined to identify a “target pixel” near the edge of an object that represents the object and is adjacent to a “background pixel” that represents only background. The target pixel may represent both the object and its background or it may represent the object only. A “second pixel”, adjacent to the target pixel and representing the object, is also identified. The second pixel may represent both the object and its background or it may represent the object only. The target pixel's location with respect to the second pixel is analyzed to determine the placement of a subpixel within the target pixel cell and the placement of a subpixel within the second pixel cell, such that the edge of the object is well-defined and the density of the object is preserved.

Abstract: An differential LNA has first and second input MOS transistors, with differential inputs applied to their respective control gates and differential outputs taken at their respective drains. The gate-to-drain, Cgd, feedback capacitances of the first and second input MOS transistors are neutralized by respective gate-to-source, Cgs, capacitances in the two neutralizing MOS transistors. A first neutralizing MOS transistor has its control gate coupled to the control gate of the first input MOS transistor, its source node coupled to the drain node of the second input MOS transistor, and its drain node coupled to a fixed potential. A second neutralizing MOS transistor has its control gate coupled to the control gate of the second input MOS transistor, its source node coupled to the drain node of the first input MOS transistor, and its drain node coupled to the same fixed potential.

Abstract: A rectangular vibrating plate 10 in which a piezoelectric element and a reinforcing plate are stacked is supported on a main plate by a support member 11, and is urged toward the rotor 100 by an elastic force of the support member 11. This brings a projection 36 provided on the vibrating plate 10 into abutment with an outer peripheral surface of the rotor 100. In this construction, when the vibrating plate 10 vibrates in the horizontal direction in the figure by an applied voltage from a driving circuit (not shown), the rotor 100 is rotated in a clockwise direction in accordance with the displacement of the projection 36 due to the vibration.

Abstract: A differential output driver capable for selectively switching from an emphasis mode, a non-emphasis mode, and an idle state uses one pull-up device and two pull-down devices per output lead. The pull-up device is preferably always activated, and one or the other or both or neither of the pull-down devices are selectively activated to provide a desired behavior. Neither pull-down device is strong enough to singularly overcome the pull-up device and fully pull down an output lead to an emphasis logic low level. One of the pull-down devices is singularly strong enough to bring an output lead to a non-emphasis logic low level, which is higher than an emphasis logic low level. The other pull-down device is singularly strong enough to pull an output line from an emphasis logic high level to a non-emphasis logic high level. Working together, however, both devices can pull-down an output lead to an emphasis logic low level.

Abstract: A precision PLL based transceiver having a single precision SAW or crystal resonator is configured to lock onto multiple different input frequencies and output generated clocks at the multiple different frequencies. The input reference frequency may be higher or lower than the resonator frequency. A fraction of two whole numbers describing a ratio of the resonator frequency to a given input frequency reference is first obtained. One of the numerator or denominator in the fraction is used to set the divide value of a first frequency divider coupling a VFO based on the resonator to a feedback input on a PFD. The other of the numerator or denominator is used to set a second frequency divider coupling the input frequency reference signal to the PFD. A first frequency multiplier is given a multiplication factor matching the divide value of the second frequency divider, and used to couple the output of the first frequency divider to the output of the PLL.

Abstract: A document categorizing apparatus includes a sentence analyzer 12 for analyzing a plurality of documents to detect titles thereof; a feature element extractor 13 for extracting feature elements from the titles detected by the sentence analyzer 12 from the respective documents; feature table generating means 14 for generating a feature table representing the relationships between the feature elements extracted from the title and the documents including the feature elements; a document categorizing unit 15 for categorizing the documents into a plurality of clusters according to semantic similarity on the basis of the content of the feature table; a categorization result storage unit 16 for storing the clusters created by the document categorization unit 15; a cluster merging unit 2 for performing a cluster merging process upon the clusters stored in the categorization result storage unit 6; and an output control unit 31 for outputting the result of the cluster merging process to a display unit 32.

Abstract: A CML master-slave latch incorporates logic into its master latching circuitry to incorporate a multiplexing function into the flip-flop. The multiplexing logic makes use of the pull-up loads and current source of the master latching circuitry. In this manner the pull-up loads and current source typically required for a stand-alone multiplexor are eliminated. Subsequently, the size of the present hybrid master-slave latch is smaller and consumes less power than a traditional combination of an independent multiplexor and master-slave latch. Since the master latching circuitry feeds only into the slave latching circuitry, the pull-up loads and the current sources of the master latching circuitry and slave latching circuitry may be optimized separately for achieving faster performance or less power consumption.

Abstract: A line driver circuit, an electro-optic device, and a display apparatus efficiently reduce cost by reducing process dimensions and effectively shorten display panel development turn-around time. A signal driver 30 for display an LCD panel of a liquid crystal display apparatus has an input terminal group 282 containing a I/O circuit area 280 to which an input signal group is input, and a output terminal group 284 from which an output signal group is output. The I/O circuit area 280 includes a phase inversion circuit 286 for phase inverting an input signal group input through the input terminal group 282, and a level shifter 288 for converting low voltage resistance voltages of the signal group phase inverted by the phase inversion circuit 286 to a high voltage resistance voltage. The input terminal group 282 and output terminal group 284 can be freely selected from plural terminal groups in the signal driver 30.

Abstract: A variable frequency oscillator having multiple, independent frequency control inputs, each coupled to a respective tuning sub-circuit. The tuning sub-circuits are connected in parallel with each other and with a resonator module, which may be a quartz crystal, inductor, or other reactance component. Each tuning sub-circuit consists of two varactors with their respective cathodes coupled to each other and to their corresponding frequency control input. By having the tuning sub-circuits connected in parallel to the resonator, the overall frequency pull range of each frequency control input remains unaffected by the activation of any other frequency control input. Preferably, at least one frequency control input is a temperature compensation control input that can maintain the variable oscillator insensitive to temperature variations while the remaining frequency control inputs provide functional frequency control.

Abstract: A rotated representation of an image is printed by using a coordinate system to assign tile divisions to the image. The size of the tile divisions are selected to maintain their area equal to, or less, than a predetermined maximum. Each segment of the image, as defined by the tile delineations, is sent separately to a data processing unit for processing. The received tile is assigned new coordinate dictating its new target position on a printed page, and its relation to the other tiles. The tile is itself further rotated prior to being send to the printer.

Abstract: A temperature compensation circuit has multiple configurable modules to produce a compensation signal whose temperature characteristic curve is the inverse of the frequency-to-temperature characteristic curve of a specified oscillator. A set of first modules that produce first sub-signals directly proportional to temperature and a set of second modules that produce second sub-signals inversely proportional to temperature have their outputs summed at a summation node. Each module may adjust the strength and shaped of its temperature characteristic sub-signal, and each module may optionally be assigned a temperature offset that impedes the output of its corresponding sub-signal until the assigned temperature offset is reached. Each of the first and second modules includes a signal generator and an optional temperature offset circuit, which may be incorporated into the operation of the signal generator.