Abstract: A long life high current density hollow cathode electron beam source for use in various E-beam apparatus which uses an ionizable gas within the hollow cathode. Bombardment of an electron emissive surface within the hollow cathode by energetic gas ions causes electrons to be emitted by secondary emission rather than thermionic emission effects. Once initialized by an external ionization voltage the device is essentially self sustaining and operates near room temperature, rather than at thermionic emission temperatures, and with reduced voltages.

Abstract: A liquid crystal storage device includes a smectic phase liquid crystalline medium in spaced relationship with at least three separated electrodes, the first of which provides a ground plane and is in contact with the liquid crystal medium; a second electrode, spaced from the first electrode, is arranged in a mesh-like or finger electrode configuration, being likewise in contact with the liquid crystal medium; a third electrode is spaced by a dielectric medium from the second electrode, such third electrode being in either orthogonal or parallel relationship with the second electrode. Voltages are selectively applied to each of the second and third electrodes such that the stable state of the liquid crystalline layer is changed from the ordered (homeotropic) or clear state, to the disordered (focal conic) or dark state.

Abstract: A key-accessed (indexed) file is organized such that the file structure consists only of two levels, an index level and a data level. Both levels are permanently stored on a page-organized secondary storage medium that supports random accessing of the pages. The index level is designed to have a fixed and specifiable number of pages and is stored entirely in the computer's memory when the file is in use. The fixed size of the index is made possible by having each index entry reference a data node with a growing (or shrinking) number of data pages as the file changes in size. Avoiding the accessing of more than one of the data pages referenced by an index entry is accomplished by means of an address computation that utilizes bits of the search argument.

Abstract: A plasma sputter etching/deposition system comprising an electron-emitting hollow cathode arc-source combined with a conventional plasma sputter etching/deposition system such as a magnetron. The electrons emitted are coupled into the intrinsic high energy, e.g., magnetic field and are accelerated by the plasma potential and cause a significant increase plasma density. The resultant combination allows much greater sputtering/deposition efficiency than was possible with previous devices. According to a further aspect of the invention, switched operation is possible, whereby etching may vary from isotropic to anisotropic. A side discharge hollow cathode structure is also described for enhancing certain sputtering/deposition processes, wherein electrons may be emitted from one or more openings at the side of a hollow cathode chamber to achieve more uniform electron emission in a large process chamber.

Abstract: A mechanism for performing a run-time storage address validity check within one machine cycle. The mechanism, functioning together with an intelligent compiler, eliminates the need for hardware implementation of a storage validity check. More particularly, the mechanism performs its function in one machine cycle in the event that a trap exception does not cause an interrupt. In the rare instance when an interrupt is necessary, a number of machine cycles will be impacted. The mechanism comprises a minimum amount of logic circuitry for determining the trap condition operating in conjunction with conventional, previously existing compare, branch instruction testing, and interrupt generation circuitry.

Abstract: A mechanism including an expanded condition register for use in a reduced instruction set computing system which facilitates the performance of single machine cycle instructions on the system and further provides for the efficient execution of more complex instructions which are not susceptible of being completed in a single machine cycle. More particularly, a mechanism is provided for setting the bits of the expanded condition register whereby a more efficient restart is possible after a machine interrupt and whereby the results of intermediate operations of certain multistep logic and arithmetic operations are maintained in the condition register in order that the cycle time of such multistep operations may be kept to a minimum, and when necessary, may be executed with greater efficiency.

Abstract: A technique and apparatus for augmenting a random access memory with a fast clear or reset mechanism are described. A dynamic RAM having a fast clear mechanism in accordance with the present invention includes means for coupling a digital signal onto all bit lines; and fast reset control means operative for energizing the coupling means for connecting the digital signal to all of the bit lines such that upon energizing of a selected word line, all the bits connected to the selected word line are reset to the state of the digital signal, whereby reset time of the random access memory is reduced. The present invention is especially beneficial for incorporation in a frame buffer of an all points addressable raster scan display, and in a page buffer of an all points addressable printer wherein there is a requirement for high update performance.

Abstract: A method of data compression which allows an enlarged font of complex characters to be produced by scaling from data representing a stored font of complex characters is disclosed. The scaling procedure involves the insertion of horizontal and vertical lines into the stored font to effect vertical and horizontal expansion, respectively, of the stored font. These lines are inserted so as to preserve the basic shape of the characters according to the following procedure. First, the dot matrix of each character is partitioned into sections, each containing a very pronounced and recognizable portion of the character. Then a decision is made in which sections to insert lines so that enlargement is attained without distorting the basic overall shape of the character. Next, a decision is made where in the sections the lines are to be inserted. Finally, a decision is made as to what the inserted lines are to look like.

Abstract: In an optimizing compiler which receives a high level source language program and produces machine interpretable instructions, a method for assigning computational data utilized by the program to a limited number of high speed machine registers in a target CPU and more particularly to such a method for determining that there are not enough registers available in the CPU to store all of the data required at the given point in time and for the determining which data should be stored in the system memory until they are actually needed. Said method being further characterized in that method utilizes a graph reduction and coloring approach in making the "spill" decisions.

Abstract: A mechanism for performing fast and efficient full shift, merge, insert and bit alignment functions within one operating machine cycle of a host primitive instructions set computing system. In general, the circuitry performs a ring shift under control of a mask. The circuitry further combines essentially parallel rotate and mask and merge functions all executable in one machine cycle. The circuitry further allows the provision of powerful bit, digit, and bit rotate with mask instructions which are particularly useful primitive operations for decimal packing and unpacking functions as well as for implementing floating point preshifting and normalization functions.

Abstract: A signature verification system includes means for obtaining acceleration data and pressure data related to a given signature and means for comparing that data with reference data previously obtained from an identified signer. The correlations between segments of a reference pressure signal and a sample pressure signal are computed. This process involves successively measuring the correlation as the two segments are shifted with respect to each other. The amount of the shifts that produce the maximum correlations between the pressure signal segments is stored in memory, and these shift values are utilized to determine the correlations of respective pairs of segments of the acceleration data. Since the acceleration data is not independently shifted in computing the correlations, substantial processing time is saved. In addition, the overall performance of the signature verification system is improved both in terms of processing time and in error rate as compared to the prior system.

Abstract: A signature verification method is based on a comparison of the dynamics of a reference and a sample signature. Acceleration and pressure signals produced by a known person when writing his or her signature are stored and used as a reference signals. Then, at a later time, a person whose signature is to be verified writes his or her signature to produce acceleration and pressure signals that are compared to the reference signals. The process of comparison involves segmenting the two sets of signals to facilitate identifying regions of high probable correlation and then correlating corresponding segment pairs. Segmentation is based on pen lifts which represent reproducible timing marks in the signatures. According to the disclosed method, a pen or other writing instrument is used which produces a signal representative of the first time derivative of the pressure forces exerted on the stylus of the pen. The second time derivative of the pressure forces is computed from the measured signal.

Abstract: A signature verification system includes means for obtaining acceleration data and pressure data related to a given signature and means for comparing that data with reference data previously obtained from an identified signer. The correlations between segments of a reference pressure signal and a sample pressure signal are computed. This process involves successively measuring the correlation as the two segments are shifted with respect to each other. The amount of the shifts that produce the maximum correlations between the pressure signal segments is stored in memory. The corresponding segments of acceleration data are shifted with respect to one another by an amount which is .+-.1 time units of the stored shift values during subsequent correlations of the acceleration data.

Abstract: In a red-emitting phosphor which includes ZnSe as a host material, copper (Cu) as an activator and aluminum (Al) as a coactivator, the improvement comprising the inclusion of a small amount of cobalt (Co) to provide superlinear characteristics to said phosphor in combination with said Cu and Al. A preferred range of concentration of said Co is 10.sup.-6 -2.times.10.sup.-5 g atom/mol. A specific application of said red-emitting superlinear phosphor is as a phosphor screen for a current density sensitive, single gun color CRT, when mixed with a green-emitting sublinear phosphor.

Abstract: The invention comprises a method and apparatus for performing a hashing operation on an N bit number under control of a prespecified N bit hashing constant which comprises performing N/K finite field partial multiplications of the object to be hashed by the hashing constant, utilizing K logic and combinatorial circuits all of which operate in parallel to completely evaluate the number in N/K operations.Another feature of the present invention is that the hashing constant loaded into the system may be changed at will with a resultant changing of the hashing characteristics to suit a particular class of objects to be hashed. This is done by a "select" operation.

Abstract: An image is displayed in an electrolytic display by the reversible deposition on electrodes having non-scattering surfaces of a deposit having light scattering properties. The deposit scatters incident light out of the specular direction and the image is formed from one only of the specular and non-specular components of the emergent light.

Abstract: A writing implement having special applicability for use as a pressure and acceleration sensitive element for use in a Signature Verification System. The pen structure includes both a writing implement for making a visible record and also includes unique transducer structures for providing both acceleration and pressure data to a remotely located verification system. The pressure sensing element is axially mounted within the pen and produces pressure signals due to axial pressure on the pen tip as an individual writes. The accelerometer structure comprises a hollow tubular piezoelectric member supported at one end and having four circumferentially disposed electrodes on the outer surface thereof, which are appropriately interconnected to produce two orthogonal acceleration component signals A.sub.x and A.sub.y.

Abstract: An algorithm and the hardware embodiment for producing a run length limited code useful in magnetic recording channels are described. The system described produces sequences which have a minimum of 1 zero and a maximum of 7 zeros between adjacent 1's. The code is generated by a sequential scheme that maps 2 bits of unconstrained into 3 bits of constrained data. The encoder is a finite state machine whose internal state description requires 3 bits. The encoder requires a lookahead of one future input vector (2 bits) and a look back at the last channel bit generated during the immediately preceding encoding operation. The error propagation due to a random error is, at most, 4 bits in bursts of 5. The hardware implementation is extremely simple and can operate at very high data speeds.

Abstract: A binary DC balanced code and an encoder circuit for effecting same is described, which translates an 8 bit byte of information into 10 binary digits for transmission over electromagnetic or optical transmission lines subject to timing and low frequency constraints. The significance of this code is that it combines a low circuit count for implementation with excellent performance near the theoretical limits, when measured with the commonly accepted criteria. The 8B/10B coder is partitioned into a 5B/6B plus a 3B/4B coder. The input code points are assigned to the output code points so the number of bit changes required for translation is minimized and can be grouped into a few classes.

Abstract: An algorithm and the hardware embodiment for producing a run length limited code useful in magnetic recording channels are described. The system described produces sequences which have a minimum of 2 zeros and a maximum of 7 zeros between adjacent 1's. The code is generated by a sequential scheme that maps 1 bit of unconstrained into 2 bits of constrained data. The encoder is a finite state machine whose internal state description requires 3 bits. It possesses the attractive feature of reset data blocks which reset it to a fixed state. The decoder requires a lookahead of three future channel symbols (6 bits) and its operation is channel state independent. The error propagation due to a random error is 3 bits. The hardware implementation is extremely simple and can operate at very high data speeds.