Abstract: An upper disk which is fixed to a tiltable arm and is formed with a groove in its circular peripheral surface is engaged with and seats between two lower circular disks having mating V-shaped knife edges, the two lower disks being fixed to a support. A second upper disk on the tiltable arm also has a groove in its circular peripheral edge and is in engagement with a lower disk on the support, the lower disk having a V-shaped knife edge. The two upper disks and the three lower disks provide three point contact to prevent orthogonal lateral and axial movement of the arm with respect to the support and to avoid friction engagement between the two sets of disks while providing accurate means for relocating the arm to its previous position after the arm has been raised, that is, when the upper disks are returned to their mating position with the lower disks after having been disengaged therefrom.

Abstract: The power producing potential of a turbocharged engine is determined by measuring the acceleration at time T.sub.1 of the turbocharger at a given turbocharger speed as the engine is accelerated, and measuring the deceleration at time T.sub.2 of the turbocharger, at the same turbocharger speed, as the engine is decelerated. The power is a constant K.sub.1 times the acceleration figure minus the deceleration figure. A more accurate result is obtained by adding a constant K.sub.2 times the engine speed at time T.sub.1 minus the engine speed at time T.sub.2.

Abstract: A signal of frequency value F.sub.IN is coupled to a discriminator and to one terminal of a voltage controlled oscillator (VCO) tuned to operate at a range of frequencies about F.sub.IN .div.N where N is a nonunity positive integer. The discriminator produces a voltage proportional to frequency F.sub.IN which is scaled and applied to a control terminal of the VCO to cause it to be tuned to approximately F.sub.IN .div.N. The signal of frequency F.sub.IN applied to the VCO causes it to be injection locked to frequency F.sub.IN .div.N.

Abstract: A spacecraft is secured to a reusable cradle mounted in a space shuttle cargo bay. It is launched from the shuttle by separation apparatus secured to the cradle, which apparatus imparts forces in the same direction to three spaced points on the spacecraft such that a line passing through the center of gravity of the spacecraft, extending in the direction of application of the forces, passes through the triangle formed by lines joining these three points. The apparatus includes a plurality of interconnected spring loaded push rods which propel the spacecraft equal distances in the same direction and time interval, thereby precluding any rotation.

Abstract: A power distribution network is disclosed for use in a frequency scan antenna element. A microwave signal applied to the input of the network is power divided and phase shifted so as to provide, at a plurality of output ports, signals of equal amplitude and, at a design frequency, phase equality. The signals appearing at the output ports are phase delayed relative to the signals at adjacent outputs such that an input signal frequency other than the design frequency presents a wave front across the output ports angled away from the normal to the output ports. The present invention discloses a series-parallel configuration of the power distribution network which provides improvements over both the pure-series and the pure-parallel configurations of the prior art.

Abstract: Circuitry responsive to an input clock (C-clock) whose duty cycle is unknown produces two clocks (A and B) in addition to the input clock. One (A-clock) of the two clocks is skewed to have a greater duty cycle than the C-clock and the other one (B-clock) of the two clocks is skewed to have a lower duty cycle than the C-clock. The two phases of each one of the A and B-clocks are compared and control signals are produced indicative of the values of the respective duty cycles and, by deduction, of the duty cycle of the C clock. The values of the control signals determine which one of the A, B, or C clocks is selected as the system clock.

Abstract: A memory which is selectively operable either as a read-write volatile memory or as a non-volatile memory includes an array of memory cells with each cell comprising a volatile secion and a non-volatile section. The volatile section includes a volatile storage element which can be easily, quickly and repeatedly switched to either binary state. The non-volatile storage section includes a programmable non-volatile electrically alterable storage element and a switching transistor whose conductivity is controlled by the difference between the potential on a word line associated with the cell and one of the operating voltages applied to the volatile section of the cell. The switching transistor when "on" electrically connects the non-volatile section in circuit with the volatile section and when "off" electrically decouples the two sections. When the switching transistor is ON, information can be transferred between the volatile section and the non-volatile section.

Abstract: The recording blank comprises a substrate having a non-etchable surface which incorporates a given surface relief pattern diffractive structure, an etchable metal overcoating in contact with the diffractive structure which overcoating has a smooth exterior surface, and a photoresist layer in contact with this smooth exterior surface. This permits a simple technique to be employed in fabricating a high quality embossing master.

Abstract: Complementary symmetry inverter connected at its output terminal to the input terminal of a complementary symmetry source follower and a feedback connection, via negligible impedance means, from the output terminal of the source follower to the input terminal of the inverter. The circuit produces at the output terminal of the source follower a voltage which is a fraction of the value of the operating voltage applied to the inverter. In one embodiment a selectively enabled switch is connected between the input and output terminals of the source follower for turning off the source follower when the switch is enabled.

Abstract: A very inexpensive computer input device for music information includes a piano-type keyboard unit adapted to be fastened on to a standard alpha-numeric computer keyboard so that manual "playing" of music on the piano keyboard results in actuation of alpha-numeric keys and the recording of the music in the computer memory, for later playback in audible form, or print-out in sheet music form.

Abstract: A system for determining the frequency of any received tone segment of N possible time synchronous tone segments each having a period T.sub.1 and each having one of N predetermined frequencies. The system comprises a first shift register having M stages, a second register also having M stages each being aligned with one of the M stages of the first shift register, sampling logic for samping each received tone segment into P samples where P is less than M and P-M=L, and logic for serially entering the P samples into the first shift register. Also provided is a time generator for generating 2N I and Q sampled reference tones each having P samples and representing one of the N predetermined frequencies, and for successively entering the 2N sampled reference tones into the second register at a rate M/WT.sub.

Abstract: Improved precharge circuit for a dynamic circuit having N, spaced apart, outputs; where N is an integer greater than 2. The conduction path of a precharge transistor is connected between each pair of outputs, whereby (N-1) precharge transistors are connected end-to-end between the N output points. At least one additional precharge transistor is connected between one of the N outputs and a precharge potential point. A common conductor interconnects the control electrodes of all the precharge transistors for, selectively, turning them on concurrently and distributing the precharge potential to all of the N outputs. The end-to-end connection of the N-1 transistors enables the conduction paths of the N-1 transistors and the common conductor to be formed orthogonally to output line conductors connected to the N outputs, thereby enabling the manufacture of a dense and compact circuit.

Abstract: An apparatus for limiting the rate at which changes on an input signal are applied to the input of a load device. The input signal is clocked out of a D-type flip-flop which output provides the device actuating signal and is also applied to a means for providing a pulse of determinable duration in response to transitions on the flip-flop output signal. During the occurrence of this pulse, the clock signal to the flip-flop is inhibited, preventing a rapid sequence of transitions on the input signal from causing a correspondingly rapid sequence of load device actuations.

Abstract: A coaxial transmission line is coupled to a dielectrically loaded rectangular waveguide by an E-plane probe which extends through a broad wall of the waveguide and into a slot in the body of loading dielectric. The slot and probe are positioned substantially laterally off-center in the body of dielectric material.

Abstract: A digitally controlled oscillator for generating a plurality of signals spaced apart by very small frequency increments. The system comprises first means for generating a source signal of frequency f.sub.c, second means responsive to said first signal to produce a first binary output signal of frequency Nf.sub.c /2.sup.n, where n is a variable integer. Also provided are first frequency divider means responsive to said first binary output signal to produce a second binary output signal of frequency Nf.sub.c /2.sup.n+m, where m is another integer and second frequency divider means also responsive to said first signal f.sub.c to produce a third binary output signal of frequency f.sub.c /2.sup.T. Further provided are logic means responsive to said second and third binary output signals to produce a fourth binary output signal of average frequency f.sub.c /2.sup.T +Nf.sub.c /2.sup.n+m.

Abstract: The circuit compensates for the difference in the source impedances of signal and reference generating circuits whose outputs are coupled to a sense circuit which loads (draws current from) the signal and reference generating circuits. The signal generating circuit has a source impedance (R.sub.1) and produces either one of two (V.sub.1H or V.sub.1L) output signal levels which is coupled via a first transmission gate having an "ON" impedance R.sub.2 to a first input terminal of the sense circuit. The reference generating circuit has a lower source impedance (R.sub.3) than the signal source and produces an output intermediate the two signal levels which is coupled via a second transmission gate having an "ON" impedance R.sub.4 to a second input terminal of the sense circuit. The reference voltage applied to the second input of the sense circuit is maintained at a predetermined level between the high and low levels of the signal applied to the first input of the sense circuit, by making the sum of R.sub.

Abstract: A gradient in the impurity concentration of the semiconductor material in a CCD imager, normal to the surface in which the charge-accumulation wells are induced, speeds the collection of charge carriers formed further from the surface by photon interaction with the semiconductor lattice. This reduces the chance for crosstalk between charge-accumulation wells owing to sideways diffusion.

Abstract: A voltage multiplier includes an inverter connected at its output to one plate of a capacitor for applying a first or a second voltage thereto, a first transistor switch which, when on, applies a second voltage to the second plate of the capacitor, and a second transistor switch which, when on, couples the second side of the capacitor to a load. For one polarity of input signal the inverter output switches from the first to the second voltage to produce an enhanced voltage at the second plate which is coupled via the second switch to the load. For the opposite polarity of input signal the inverter output switches from the second to the first voltage and the first switch is turned on.

Abstract: Enhanced optical coupling by phase evanescent fields is achieved by covering the planar layer of a waveguide with a thin metal oxide film incorporating a relief phase grating. The grating is originally formed in a metallic film covering the planar layer, which metallic film is converted to a metal oxide film by heating in an oxygen-containing atmosphere.

Abstract: A decoder in which the decoding of N input variables to produce 2.sup.N unique outputs is carried out in steps, and in which some of the signals to be decoded also function to power part of the decoding circuitry. First, X of the N variables are decoded separately, as a group, to produce 2.sup.X unique outputs while the remaining N-X variables are also separately decoded, as a group, to produce 2.sup.(N-X) unique outputs, where N and X are positive integers and X is less than N. Then, the outputs of the two groups are logically combined by means of 2.sup.N decoding buffer gates to produce 2.sup.N unique outputs. Each one of the 2.sup.X unique outputs is applied to the signal input terminals of 2.sup.(N-X) different ones of the 2.sup.N buffer gates and each one of the 2.sup.(N-X) unique outputs is used to power 2.sup.X different ones of the 2.sup.N buffer gates to produce 2.sup.N unique outputs of the N input variables, at the outputs of the buffer gates.