Patents Represented by Attorney Shirley L. Church
  • Patent number: 6620575
    Abstract: The present invention pertains to a method for depositing built-up structures on the surface of patterned masking material used for semiconductor device fabrication. Such built-up structures are useful in achieving critical dimensions in the fabricated device. The composition of the built-up structure to be fabricated is dependant upon the plasma etchants used during etching of underlying substrates and on the composition of the substrate material directly underlying the masking material.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: September 16, 2003
    Assignee: Applied Materials, Inc
    Inventors: Nam-Hun Kim, Jeffrey D. Chinn
  • Patent number: 6613666
    Abstract: Charging damage, caused by electron shading during plasma etching in a dual damascene structure, is alleviated by first depositing a protective conductive layer which provides a conductive path for maintaining charge balance in the etched structures. This conductive layer reduces the buildup of unbalanced positive charge in the contact opening, and the damage done to underlying layers caused by the resultant tunneling current. Further, if the protective conductive layer comprises a material which can also serve as an interdiffusion barrier layer for the contact opening fill material, a separate subsequent step to deposit such a barrier layer on the contact opening sidewall is avoided. Further, in the process of doing lithography on the trench etch resist layer, the protective conductive layer also functions as an antireflective coating, permitting the stepper to accurately focus the desired pattern.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: September 2, 2003
    Assignee: Applied Materials Inc.
    Inventor: Shawming Ma
  • Patent number: 6613682
    Abstract: The present invention provides a method for the simultaneous removal of an oxygen and/or nitrogen-containing dielectric antireflective coating (“DARC”) during plasma etching of an underlying layer in a film stack. According to the method of the invention, the film stack is etched using a plasma containing reactive fluorine species. The concentration of reactive fluorine species within the plasma is controlled based on one or more of the following factors: the oxygen content of the antireflective coating, the nitrogen content of the antireflective coating, the thickness of the antireflection coating layer, and the thickness of the underlying film stack layer. The disclosure of the invention provides preferred combinations of plasma source gases which provide for the simultaneous removal of an oxygen and/or nitrogen-containing DARC layer during etching of an underlying etch stack layer, where the underlying stack layer comprises a metal silicide, polysilicon, or a metal.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: September 2, 2003
    Assignee: Applied Materials Inc.
    Inventors: Mohit Jain, Thorsten Lill, Jeff Chinn
  • Patent number: 6607675
    Abstract: We have discovered a method for plasma etching a carbon-containing silicon oxide film which provides excellent etch profile control, a rapid etch rate of the carbon-containing silicon oxide film, and high selectivity for etching the carbon-containing silicon oxide film preferentially to an overlying photoresist masking material. When the method of the invention is used, a higher carbon content in the carbon-containing silicon oxide film results in a faster etch rate, at least up to a carbon content of 20 atomic percent. In particular, the carbon-containing silicon oxide film is plasma etched using a plasma generated from a source gas comprising NH3 and CxFy. It is necessary to achieve the proper balance between the relative amounts of NH3 and CxFy in the plasma source gas in order to provide a balance between etch by-product polymer deposition and removal on various surfaces of the substrate being etched.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: August 19, 2003
    Assignee: Applied Materials Inc.
    Inventors: Chang Lin Hsieh, Hui Chen, Jie Yuan, Yan Ye
  • Patent number: 6605319
    Abstract: The method of the invention involves depositing a plurality of thin layers of film, each layer having a thickness ranging from about 500Å to about 2000Å. Low Pressure Chemical Vapor Deposition or other techniques known in the art maybe used to deposit each thin layer of film. The film is polysilicon or silicon-germanium, where the germanium content ranges from about 4% by weight to about 20% by weight germanium. A Rapid Thermal Anneal (“RTA”) is performed on a deposited thin film layer to relieve residual film stress in at least that film layer. The use of RTA rather than furnace annealing permits much shorter annealing times. Optionally, but advantageously, hydrogen may be present during RTA to permit the use of lower processing temperatures, typically about 20% lower relative to a customary anneal. A series of film deposition/rapid thermal anneal cycles is used to produce the desired, nominal total thickness polysilicon film.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: August 12, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Jeffrey D. Chinn, Yi-Hsing Chen, Robert Z. Bachrach, John Christopher Moran
  • Patent number: 6605394
    Abstract: The disclosure pertains to a method of optically fabricating a photomask using a direct write continuous wave laser, comprising a series of steps including applying an organic antireflection coating over a chrome-containing layer; applying a chemically-amplified DUV photoresist over the organic antireflection coating; and exposing a surface of the DUV photoresist to the direct write continuous wave laser. The direct write continuous wave laser operates at a wavelength of 244 nm or 257 nm. In an alternative embodiment, the organic antireflection coating may be applied over an inorganic antireflection coating which overlies the chrome containing layer.
    Type: Grant
    Filed: May 3, 2001
    Date of Patent: August 12, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Melvin W. Montgomery, Jeffrey A Albelo
  • Patent number: 6605197
    Abstract: The present disclosure pertains to a method of filling features (typically trenches or vias) on a semiconductor workpiece surface with copper using sputtering techniques previously believed incapable of achieving a copper fill. In particular, when the feature is to be filled with a single, continuous application of sputtered copper, the surface of the substrate to which the sputtered copper is applied should range between about 200° C. and about 600° C.; preferably the surface temperature of the substrate ranges between about 300° C. and about 500° C. When the feature is to be filled using a thin wetting layer of copper, followed by a fill layer of copper, the wetting layer may be applied by sputtering techniques or by other methods such as evaporation or CVD, while the fill layer of copper is applied using sputtering techniques. The thin wetting layer of copper is applied at a substrate surface temperature ranging between about 20° C. to about 250° C.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: August 12, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Peijun Ding, Tony Chiang, Barry L. Chin
  • Patent number: 6599437
    Abstract: A two-step method of etching an organic coating layer, in particular, an organic antireflection coating (ARC) layer, is disclosed. During the main etch step, the organic coating layer is etched using a plasma generated from a first source gas which includes a fluorocarbon and a non-carbon-containing, halogen-comprising gas. Etching is performed using a first substrate bias power. During the overetch step, residual organic coating material remaining after the main etch step is removed by exposing the substrate to a plasma generated from a second source gas which includes a chlorine-containing gas and an oxygen-containing gas, and which does not include a polymer-forming gas. The overetch step is performed using a second substrate bias power which is less than the first substrate bias power.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: July 29, 2003
    Assignee: Applied Materials Inc.
    Inventors: Oranna Yauw, Meihua Shen, Nicolas Gani, Jeffrey D. Chinn
  • Patent number: 6592707
    Abstract: A corrosion-resistant protective coating for an apparatus and method of processing a substrate in a chamber containing a plasma of a processing gas. The protective coating or sealant is used to line or coat inside surfaces of a reactor chamber that are exposed to corrosive processing gas that forms the plasma. The protective coating comprises at least one polymer resulting from a monomeric anaerobic chemical mixture having been cured in a vacuum in the absence of oxygen. The protective coating includes a major proportion of at least one methacrylate compound and a minor proportion of an activator compound which initiates the curing process of the monomeric anaerobic mixture in the absence of oxygen or air.
    Type: Grant
    Filed: October 22, 2001
    Date of Patent: July 15, 2003
    Assignee: Applied Materials Inc.
    Inventors: Hong Shih, Nianci Han, Jie Yuan, Joe Sommers, Diana Ma, Paul Vollmer, Michael C. Willson
  • Patent number: 6582861
    Abstract: The invention relates to a method of improving control over the dimensions of a patterned photoresist, which enables better control of the critical dimensions of a photomask or reticle which is fabricated using the patterned photoresist. In addition, the method may be used to enable improved control over the dimensions of a semiconductor device fabricated using a patterned photoresist. In particular, a patterned photoresist is treated with an etchant plasma to reshape the surface of the patterned photoresist, where reshaping includes the removal of “t”-topping at the upper surface of the patterned resist, the removal of standing waves present on patterned surfaces, and the removal of feet which may be present at the base of the patterned photoresist, where the photoresist contacts an underlying layer such as an ARC layer.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: June 24, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Alex Buxbaum, Melvin W. Montgomery
  • Patent number: 6579796
    Abstract: Disclosed herein is a method of etching platinum using a silicon carbide mask. The method comprises providing an etch stack including a patterned silicon carbide layer overlying a layer of platinum, then pattern etching the platinum layer using a plasma generated from a source gas comprising Cl2, BCl3, and a nonreactive, diluent gas. The silicon carbide mask can be deposited and patterned using standard industry techniques, and can be easily removed without damaging either the platinum or an underlying doped substrate material. The method provides a smooth platinum etch profile and an etch profile angle of about 75° to about 90°. Also disclosed herein are methods of forming semiconductor structures useful in the preparation of DRAM and FeRAM cells.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: June 17, 2003
    Assignee: Applied Materials Inc.
    Inventors: Chentsau Ying, Jeng H. Hwang, Luc Van Autryve
  • Patent number: 6579806
    Abstract: The present invention relates to a method of etching tungsten or tungsten nitride in semiconductor structures. We have discovered a method of etching tungsten or tungsten nitride which permits precise etch profile control while providing a rapid etch rate. In particular, the method employs the use of a plasma source gas where the chemically functional etchant species are generated from a combination of sulfur hexafluoride (SF6) and nitrogen (N2), where the sulfur hexafluoride and nitrogen are provided in a volumetric flow rate ratio within the range of about 1:2.5 to about 6:1.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: June 17, 2003
    Assignee: Applied Materials Inc.
    Inventors: Padmapani Nallan, Hakeem Oluseyi
  • Patent number: 6576489
    Abstract: The invention includes methods of forming microstructure devices. In an exemplary method, a substrate is provided which includes a first material and a second material. At least one of the first and second materials is exposed to vapor-phase alkylsilane-containing molecules to form a coating over the at least one of the first and second materials.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: June 10, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Toi Yue Becky Leung, Jeffrey D. Chinn
  • Patent number: 6565984
    Abstract: We have discovered that the formation of particulate inclusions at the surface and the interior of an aluminum alloy article interferes with the performance of the article when a surface of the article is protected by an anodized coating. We have also discovered that the formation of such particulate inclusions can be controlled to a large extent by controlling the concentration of particular impurities present in the alloy used to fabricate the aluminum alloy article.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: May 20, 2003
    Assignee: Applied Materials Inc.
    Inventors: Shun Wu, Clifford Stow, Hong Wang, Yixing Lin
  • Patent number: 6551941
    Abstract: A method of forming a notch silicon-containing gate structure is disclosed. This method is particularly useful in forming a T-shaped silicon-containing gate structure. A silicon-containing gate layer is etched to a first desired depth using a plasma generated from a first source gas. During the etch, etch byproducts deposit on upper sidewalls of the silicon-containing gate layer which are exposed during etching, forming a first passivation layer which protects the upper silicon-containing gate layer sidewalls from etching during subsequent processing steps. A relatively high substrate bias power is used during this first etch step to ensure that the passivation layer adheres properly to the upper silicon-containing gate sidewalls.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: April 22, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Chan-syun David Yang, Meihua Shen, Oranna Yauw, Jeffrey D. Chinn
  • Patent number: 6548415
    Abstract: The present disclosure provides a method for etchback of a conductive layer in a contact via (contact hole). The method described is typically used in the formation of a conductive plug within the contact hole. The method includes a first etchback in which the conductive layer is etched back; a buffer (i.e., transition) step during which the etch rate of the conductive layer is reduced; and a second etchback in which the amount of chemically reactive etchant is reduced from that used in the first etchback and a plasma species is added to provide additional physical bombardment, in an isotropic etch of the substrate surface surrounding the contact hole.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: April 15, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Chris Ting, Janet Yu
  • Patent number: 6547978
    Abstract: Copper can be pattern etched in a manner which provides the desired feature dimension and integrity, at acceptable rates, and with selectivity over adjacent materials. To provide for feature integrity, the portion of the copper feature surface which has been etched to the desired dimensions and shape must be protected during the etching of adjacent feature surfaces. This is particularly important for feature sizes less than about 0.5 &mgr;m, where presence of even a limited amount of a corrosive agent can eat away a large portion of the feature.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: April 15, 2003
    Assignee: Applied Materials Inc.
    Inventors: Yan Ye, Allen Zhao, Xiancan Deng, Diana Xiaobing Ma, Chang-Lin Hsieh
  • Patent number: 6547977
    Abstract: The present disclosure pertains to a method for plasma etching of low k materials, particularly polymeric-based low k materials. Preferably the polymeric-based materials are organic-based materials. The method employs an etchant plasma where the major etchant species are generated from a halogen other than fluorine and oxygen. The preferred halogen is chlorine. The volumetric (flow rate) ratio of the halogen:oxygen in the plasma source gas ranges from about 1:20 to about 20:1. The atomic ratio of the halogen:oxygen preferably falls within the range from about 1:20 to about 20:1. When the halogen is chlorine, the preferred atomic ratio of chlorine:oxygen ranges from about 1:10 to about 5:1. When this atomic ratio of chlorine:oxygen is used, the etch selectivity for the low k material over adjacent oxygen-comprising or nitrogen-comprising layers is advantageous, typically in excess of about 10:1.
    Type: Grant
    Filed: July 5, 2000
    Date of Patent: April 15, 2003
    Assignee: Applied Materials Inc.
    Inventors: Chun Yan, Gary C. Hsueh, Yan Ye, Diana Xiaobing Ma
  • Patent number: 6544896
    Abstract: Conventional methods of etching TiSix use Cl2 or HBr as the plasma etchant. However, these methods can lead to undesirable residues, due to the presence of silicon nodules in the TiSix The present invention overcomes the residue problem by adding a fluorine containing gas to the plasma etchant, which is then able to effectively etch the Si nodules at an etch rate which is approximately the same as the etch rate of the TiSix, so that the undesirable residue is not formed. A method of etching TiSix is provided, wherein the surface of the TiSix is exposed, typically through a patterned mask, to a plasma etchant. The plasma etchant comprises (i) at least one fluorine containing gas, such as SF6, NF3, CxFy, and compatible mixtures of such gases; and (ii) a gas selected from the group consisting of HBr, Cl2, and combinations thereof.
    Type: Grant
    Filed: October 10, 2000
    Date of Patent: April 8, 2003
    Assignee: Applied Materials Inc.
    Inventors: Songlin Xu, Takakazu Kusuki, Xueyu Qian
  • Patent number: 6546276
    Abstract: A method and apparatus for remotely monitoring the location of an interventional medical device (IMD) using ultrasonic signals. Both the proximity and alignment of the IMD are calculated from ultrasound signals reflected off the tissue surface. The inclusion of an offset between the distal end of the IMD and the ultrasound transducer enables accurate position and alignment monitoring of when the IMD is in contact with, or very close to, the tissue surface. The timing of the reflected signal is used to measure proximity or contact. A comparison of the strength between multiple reflected signals is used to measure the alignment of the IMD in 3D space or perpendicularity to a given surface. The present invention may be used as a location indicator within a wide variety of IMDs, and in a wide variety of medical procedures.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: April 8, 2003
    Inventor: Claudio I. Zanelli