Abstract: In one embodiment, a sensor for circuit testing has a first terminal and a second terminal. The first terminal is configured to be coupled to a first node of a first circuit via a first capacitor, and the second terminal is configured to be coupled to a second node of the first circuit. The sensor also has at least one transmitter and at least one receiver that measures a first transmission factor between the first terminal and the second terminal. The sensor determines that the first circuit is in a first state if the first transmission factor is above a first threshold, and determines that the first circuit is in a second state if the first transmission factor is below the first threshold.

Abstract: A semiconductor device includes a substrate formed of a first semiconductor material; two insulators on the substrate; and a semiconductor region having a portion between the two insulators and over the substrate. The semiconductor region has a bottom surface contacting the substrate and having sloped sidewalls. The semiconductor region is formed of a second semiconductor material different from the first semiconductor material.

Abstract: An embodiment of the invention provides a semiconductor fabrication method. The method comprises forming an isolation region between a first and a second region in a substrate, forming a recess in the substrate surface, and lining the recess with a uniform oxide. Embodiments further include doping a channel region under the bottom recess surface in the first and second regions and depositing a gate electrode material in the recess. Preferred embodiments include forming source/drain regions adjacent the channel region in the first and second regions, preferably after the step of depositing the gate electrode material. Another embodiment of the invention provides a semiconductor device comprising a recess in a surface of the first and second active regions and in the isolation region, and a dielectric layer having a uniform thickness lining the recess.

Abstract: A semiconductor device including a capacitor and a proximate high-voltage gate having a boron-barrier layer that ideally serves as part of both the capacitor dielectric and the (high voltage) HV gate oxide. The boron-barrier layer is preferably formed over a poly oxide layer that is in turn deposited on a substrate infused to create a neighboring wells, and N-well over which the capacitor will be formed, and P-well to be overlaid by the HV gate. The boron-barrier helps to reduce or eliminate the harmful effects of boron diffusion from the P-well during TEOS deposition of the gate oxide material.

Abstract: A micromagnetic device includes a first insulating layer formed above a substrate, a first seed layer formed above the first insulating layer, a first conductive winding layer selectively formed above the first seed layer, and a second insulating layer formed above the first conductive winding layer. The micromagnetic device also includes a first magnetic core layer formed above the second insulating layer, a third insulating layer formed above the first magnetic core layer, and a second magnetic core layer formed above the third insulating layer. The micromagnetic device still further includes a fourth insulating layer formed above the second magnetic core layer, a second seed layer formed above the fourth insulating layer, and a second conductive winding layer formed above the second seed layer and in vias to the first conductive winding layer. The first and second conductive winding layers form a winding for the micromagnetic device.

Abstract: A semiconductor device, such as a PMOS or NMOS device, having localized stressors is provided. Recesses are formed on opposing sides of a gate electrode. A stress-inducing region is formed along a bottom of the recess, and a stressed layer is formed over the stress-inducing region. By having a stress-inducing region with a larger lattice structure than the stressed layer, a tensile strain may be created in a channel region of the semiconductor device and may be suitable for an NMOS device. By having a stress-inducing region with a smaller lattice structure than the stressed layer, a compressive strain may be created in the channel region of the semiconductor device and may be suitable for a PMOS device. Embodiments may be applied to various types of substrates and semiconductor devices, such as planar transistors and finFETs.

Abstract: In accordance with an embodiment, a method of operating a base station in a wireless system, includes partitioning a frequency band into at least one band of a first type and at least one band of a second type, and coordinating the partitioning with at least one further base station. The at least one band of the first type includes a band on which the base station transmits power proportional to a distance of a user device from the base station, and the at least one band of the second type comprises a band on which base station transmits a data rate inversely proportional to a distance of a user device from the base station.

Abstract: A blast energy mitigation structure may employ a V-shaped hull to decrease the pressure wave imparted to a vehicle during a blast event, and/or an energy absorbing structure to absorb a portion of the blast force, thereby minimizing the forces and accelerations experienced by passengers in the vehicle and consequently reducing their injuries and increasing their survivability during a blast event. An exemplary blast energy mitigation structure may have a V-shaped hull and an energy absorbing structure incorporated into the chassis of a vehicle such as a Tactical Wheeled Vehicle, the energy absorbing structure comprising a truss-like structure including I-beams.

Abstract: A lighting device is disclosed, having a first light output side, a second light output side, and an organic layer stack, disposed between the first and second light output sides, wherein during operation of the lighting device, light with different light properties emerges though the first and the second light output sides.

Abstract: A system and method for providing an accurate current reference using a low-power current source is disclosed. A preferred embodiment comprises a system comprises a first section and a second section. The first section comprises a first simple current reference, an accurate current reference, and a circuit that generates a digital error signal based upon a comparison of an output of the first simple current reference and an output of the accurate current reference. The second section comprises a second simple current reference providing a second reference current, an adjustment circuit providing an adjustment current based upon the digital error signal, and a circuit biased with current equivalent to a summation of the second reference current and the adjustment current. The first simple current reference and the second simple current reference may be equivalent circuits.

Abstract: The invention relates to a radiation-emitting semiconductor chip, comprising an active zone for generating radiation having a wavelength lambda and a structured region having irregularly arranged structure elements which contain a first material having a first refractive index n1 and which are surrounded by a medium comprising a second material having a second refractive index n2. A method for producing a semiconductor chip of this type is furthermore specified.

Abstract: A system and method for controlling torque and/or speed of wheels of a vehicle. The system and method receive one or more vehicle operating signals. Based on the received vehicle operating signals, the system and method determine whether one or more of a vehicle's wheels require torque or speed modification. If it is determined that one or more of the vehicle's wheels requires torque or speed modification, the system and method modifies the torque to drive, or speed of, a wheel or wheels based on the received vehicle operating signals. The modification is automatic and/or independent for each wheel. Some or all wheels can be coupled to respective wheel hubs having incorporated therewith an engagement/disengagement mechanism. The system and method can control the engagement/disengagement mechanism to modify the torque at, or speed of, the associated wheel based on the received vehicle operating signal or signals.

Abstract: A method of forming an integrated circuit structure includes providing a semiconductor substrate; forming a first isolation region in the semiconductor substrate; after the step of forming the first isolation region, forming a metal-oxide-semiconductor (MOS) device at a surface of the semiconductor substrate, wherein the step of forming the MOS device comprises forming a source/drain region; and after the step of forming the MOS device, forming a second isolation region in the semiconductor substrate.

Abstract: A device includes a semiconductor substrate having a front surface and a back surface opposite the front surface. An insulation region extends from the front surface into the semiconductor substrate. An inter-layer dielectric (ILD) is over the insulation region. A landing pad extends from a top surface of the ILD into the insulation region. A through-substrate via (TSV) extends from the back surface of the semiconductor substrate to the landing pad.

Abstract: In a resource allocation method for a multi-mode terminal, a control network element of a first network technology type obtains information about a radio resource of a second network technology type. The radio resource of the second network technology type is used by the multi-mode terminal and the information about the radio resource of the second network technology type indicates a carrier frequency. The control network element of the first network technology type determines that a carrier frequency allocated to the multi-mode terminal serves as a radio resource of the first network technology type according to the carrier frequency indicated by the information of the radio resource of the second network technology type and according to a maximum spectral width between a service of the first network technology type and a service of the second network technology type.

Abstract: A system and method for detecting soft-failures in integrated circuits is provided. A circuit includes a combinatorial logic block having a first signal input and a second signal input, and a latch coupled to an output of the combinatorial logic block. The combinatorial logic block produces a pulse when only one of either a first signal provided by the first signal input or a second signal provided by the second signal input is a logical high value, and the latch captures the pulse if the pulse has a pulse width greater than a second threshold. The pulse has a pulse width that is based on a timing difference between a first signal transition on the first signal and a second signal transition on the second signal, the combinatorial logic block produces the pulse if the timing difference is greater than a first threshold, and the combinatorial logic block operates with balanced inputs.

Abstract: An embodiment of the invention concerns a light-emitting device with an adjustable, time-variable luminance. This is achieved through electrically conductive tracks that are applied to the first electrode area. The conductive tracks are driven in a time-variable manner with different levels of electrical power.

Abstract: Apparatus and methods for providing a molded chip interposer structure and assembly. A molded chip structure having at least two integrated circuit dies disposed within a mold compound is provided having the die bond pads on the bottom surface; and solder bumps are formed in the openings of a dielectric layer on the bottom surface, the solder bumps forming connections to the bond pads. An interposer having a die side surface and a board side surface is provided having bump lands receiving the solder bumps of the molded chip structure on the die side of the interposer. An underfill layer is formed between the die side of the interposer and the bottom surface of the molded chip structure surrounding the solder bumps. Methods for forming the molded chip interposer structure are disclosed.

Abstract: A method for processing multi-channel audio signals includes receiving L channel audio signals from participating conference terminals, decoding the L channel audio signals, and determining N conference terminals whose audio signals are to be mixed from the participating conference terminals according to the data obtained through decoding; selecting an encoder as a common encoder from L?N encoders of the participating conference terminals except the N conference terminals whose audio signals are to be mixed, encoding decoded audio signals of the N conference terminals whose audio signals are to be mixed, and sending encoded data to conference terminals corresponding to the L?N encoders (indicating that the number of encoders is equal to the value of L minus N); and updating encoding status information of L?N?1 encoders except the common encoder to synchronize with encoding status information of the common encoder.

Abstract: A method includes retrieving first layouts of an integrated circuit from a non-transitory computer-readable medium. The first layouts include a via pattern in a via layer, and a metal line pattern in a metal layer immediately over the via layer. The metal line pattern has an enclosure to the via pattern. The enclosure is increased to a second enclosure to generate second layouts of the integrated circuit.