Patents Represented by Attorney, Agent or Law Firm Stephen A. Gratton
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Patent number: 7935991Abstract: A semiconductor component includes a semiconductor substrate having at least one conductive interconnect on the backside thereof bonded to an inner surface of a substrate contact. A stacked semiconductor component includes multiple semiconductor components in a stacked array having bonded connections between conductive interconnects on adjacent components. An image sensor semiconductor component includes a semiconductor substrate having light detecting elements on the circuit side, and conductive interconnects on the backside.Type: GrantFiled: May 3, 2008Date of Patent: May 3, 2011Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, William M. Hiatt, David R. Hembree
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Patent number: 7919846Abstract: A stacked semiconductor component includes a plurality of semiconductor substrates in a stacked array and a continuous wire extending through aligned vias on the semiconductor substrates of the stacked array in electrical contact with contacts on the semiconductor substrates. A method for fabricating the semiconductor component includes the steps of stacking the semiconductor substrates in a stacked array with aligned vias; threading a wire through the aligned vias; and forming a plurality of electrical connections between the wire and the contacts on the semiconductor substrates.Type: GrantFiled: February 10, 2010Date of Patent: April 5, 2011Assignee: Micron Technology, Inc.Inventor: David R. Hembree
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Patent number: 7883908Abstract: A method for fabricating a semiconductor component with an encapsulated through wire interconnect includes the steps of providing a substrate having a first side, a second side and a substrate contact; forming a via in the substrate contact and the substrate to the second side; placing a wire in the via; forming a first contact on the wire proximate to the first side and a second contact on the wire proximate to the second side; and forming a polymer layer on the first side leaving the first contact exposed. The polymer layer can be formed using a film assisted molding process including the steps of: forming a mold film on tip portions of the bonding members, molding the polymer layer, and then removing the mold film to expose the tip portions of the bonding members. The through wire interconnect provides a multi level interconnect having contacts on opposing sides of the semiconductor substrate.Type: GrantFiled: October 19, 2009Date of Patent: February 8, 2011Assignee: Micron Technology, Inc.Inventors: David R. Hembree, Alan G. Wood
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Patent number: 7833832Abstract: A method for fabricating a semiconductor component with through interconnects can include the steps of providing a semiconductor substrate with substrate contacts, and forming openings from a backside of the substrate aligned with the substrate contacts. The method can also include the steps of providing an interposer substrate (or alternately a second semiconductor substrate), forming projections on the interposer substrate (or on the second semiconductor substrate), and forming conductive vias in the projections. The method can also include the steps of placing the projections in physical contact with the openings, and placing the conductive vias in electrical contact with the substrate contacts. The method can also include the steps of bonding the conductive vias to the substrate contacts, and forming terminal contacts on the interposer substrate (or alternately on one of the semiconductor substrates) in electrical communication with the conductive vias.Type: GrantFiled: March 27, 2009Date of Patent: November 16, 2010Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, Warren M. Farnworth, David R. Hembree
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Patent number: 7807502Abstract: A semiconductor package includes a substrate having contacts, and a discrete component on the substrate in electrical communication with the contacts. The package also includes a semiconductor die on the substrate in electrical communication with the contacts, and a die attach polymer attaching the die to the substrate. The die includes a recess, and the discrete component is contained in the recess encapsulated in the die attach polymer. A method for fabricating the package includes the steps of: attaching the discrete component to the substrate, placing the die attach polymer on the discrete component and the substrate, pressing the die into the die attach polymer to encapsulate the discrete component in the recess and attach the die to the substrate, and then placing the die in electrical communication with the discrete component. An electronic system includes the semiconductor package mounted to a system substrate.Type: GrantFiled: April 19, 2010Date of Patent: October 5, 2010Assignee: Micron Technology, Inc.Inventors: Chua Swee Kwang, Chia Yong Poo
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Patent number: 7786605Abstract: A semiconductor component includes a semiconductor substrate having a substrate contact, and a through wire interconnect (TWI) bonded to the substrate contact. The through wire interconnect (TWI) includes a via through the substrate contact and the substrate, a wire in the via bonded to the substrate contact, and a contact on the wire. A stacked semiconductor component includes the semiconductor substrate, and a second semiconductor substrate stacked on the substrate and bonded to a through wire interconnect on the substrate. A method for fabricating a semiconductor component with a through wire interconnect includes the steps of providing a semiconductor substrate with a substrate contact, forming a via through the substrate contact and part way through the substrate, placing the wire in the via, bonding the wire to the substrate contact, and then thinning the substrate from a second side to expose a contact on the wire.Type: GrantFiled: September 23, 2007Date of Patent: August 31, 2010Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, David R. Hembree
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Patent number: 7781868Abstract: A semiconductor component includes a semiconductor substrate having a circuit side with integrated circuits and substrate contacts and a back side, a plurality of through interconnects in the substrate, and redistribution conductors on the back side of the substrate. Each through interconnect includes a via aligned with a substrate contact, and a conductive layer at least partially lining the via in physical and electrical contact with the substrate contact. Each redistribution conductor is formed by a portion of the conductive layer. A system includes a supporting substrate and at least one semiconductor substrate having the through interconnects and the redistribution conductors.Type: GrantFiled: February 19, 2009Date of Patent: August 24, 2010Assignee: Micron Technology, Inc.Inventor: David S. Pratt
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Patent number: 7776647Abstract: A semiconductor component includes a thinned semiconductor substrate having protective polymer layers on up to six surfaces. The component also includes contacts on a circuit side of the substrate, conductive vias in electrical contact with the contacts, and conductors on a backside of the substrate. A method for fabricating the component includes the steps of providing the semiconductor substrate with the contacts on the circuit side, forming conductive vias from the back side in electrical contact with the contacts, and forming conductors on the backside.Type: GrantFiled: July 31, 2006Date of Patent: August 17, 2010Assignee: Micron Technology, Inc.Inventors: Warren M. Farnworth, Alan G. Wood, Trung Tri Doan
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Patent number: 7768096Abstract: A system for fabricating semiconductor components includes a semiconductor substrate, a thinning system for thinning the semiconductor substrate, an etching system for forming the substrate opening, and a bonding system for bonding the conductive interconnect to the substrate contact. The semiconductor component can be used to form module components, underfilled components, stacked components, and image sensor semiconductor components.Type: GrantFiled: May 3, 2008Date of Patent: August 3, 2010Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, William M. Hiatt, David R. Hembree
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Patent number: 7757385Abstract: A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on the back side, forming a bonded contact on the wire on the circuit side, and then severing the wire from the bonded contact. The through wire interconnect includes the wire in the via, the contact on the back side and the bonded contact on the circuit side. The contact on the back side, and the bonded contact on the circuit side, permit multiple components to be stacked with electrical connections between adjacent components. A system for performing the method includes the substrate with the via, and a wire bonder having a bonding capillary configured to thread the wire through the via, and form the contact and the bonded contact.Type: GrantFiled: May 3, 2007Date of Patent: July 20, 2010Assignee: Micron Technology, Inc.Inventor: David R. Hembree
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Patent number: 7755385Abstract: A method of operating an electronic device having an output driver with on die termination legs ODT, and non-ODT legs, includes the step of selectively tri-stating tuning transistors (ZQ trim devices) in the legs as a function of the operational state of the output driver. The tri-stating step is performed such that when a leg is not being utilized, the tuning transistors in the unused leg are placed in a tri-state. For example, during an ODT mode of the output driver, the tuning transistors in the non-ODT legs are tri-stated. During a READ mode of the output driver, the tuning transistors in the ODT legs are tri-stated. During a HiZ mode of the output driver, the tuning transistors in both legs are tri-stated. Tri-stating the tuning transistors in the unused output driver legs can reduce DQ pin capacitance by a total of approximately (Cgd+Cgs+Cgb).Type: GrantFiled: December 22, 2008Date of Patent: July 13, 2010Assignee: Micron Technology, Inc.Inventor: Raghukiran Sreeramaneni
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Patent number: 7740010Abstract: A system includes a hydrogen fueled internal combustion engine, a fuel system configured to provide a flow of hydrogen fuel to the engine, and an exhaust gas recirculation (EGR) system configured to provide a flow of recirculated gas to the engine which includes exhaust gases. The system also includes an engine controller configured to control the fuel system and the EGR system, such that the engine receives a mixture which includes the hydrogen fuel, the ambient air and the recirculated gas in a stoichiometric fuel/air ratio that meets the torque demand on the engine. A method includes the steps of providing a flow of gaseous hydrogen fuel, a flow of ambient air, and a flow of recirculated exhaust gas to the engine.Type: GrantFiled: October 13, 2007Date of Patent: June 22, 2010Assignee: Eden Innovations Ltd.Inventors: Justin Fulton, Franklin Earl Lynch
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Patent number: 7740031Abstract: A gas blending and compressing system includes a blender having a blending chamber configured to blend two or more separate gases into a blended gas, a compressor configured to compress the blended gas to a selected pressure, and a control system configured to sense operational parameters of the blender and the compressor, to sense one or more properties of the blended gas and to control the operation of the blender and the compressor to maintain the quality of the blended gas. A method for blending and compressing two or more gases includes the steps of: blending the separate gases into a blended gas using the blender; compressing the blended gas using the compressor; and matching a constant flow through the compressor to a selected minimum flow dependent on nominal operating parameters of the compressor. Alternate embodiment systems and methods blend separate gases at high pressure without using a compressor.Type: GrantFiled: April 26, 2006Date of Patent: June 22, 2010Assignee: Eden Innovations Ltd.Inventors: Gregory J. Egan, Justin Fulton, Roger W. Marmaro, Franklin Earl Lynch
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Patent number: 7728443Abstract: A method for fabricating a semiconductor component with a through wire interconnect includes the step of providing a substrate having a circuit side, a back side, and a through via. The method also includes the steps of: threading a wire through the via, forming a contact on the wire on the back side, forming a bonded contact on the wire on the circuit side, and then severing the wire from the bonded contact. The through wire interconnect includes the wire in the via, the contact on the back side and the bonded contact on the circuit side. The contact on the back side, and the bonded contact on the circuit side, permit multiple components to be stacked with electrical connections between adjacent components. A system for performing the method includes the substrate with the via, and a wire bonder having a bonding capillary configured to thread the wire through the via, and form the contact and the bonded contact.Type: GrantFiled: May 2, 2007Date of Patent: June 1, 2010Assignee: Micron Technology, Inc.Inventor: David R. Hembree
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Patent number: 7727872Abstract: A system for fabricating semiconductor components includes a semiconductor substrate, a thinning system for thinning the semiconductor substrate, an etching system for forming the substrate opening, and a bonding system for bonding the conductive interconnect to the substrate contact. The semiconductor component can be used to form module components, underfilled components, stacked components, and image sensor semiconductor components.Type: GrantFiled: May 9, 2008Date of Patent: June 1, 2010Assignee: Micron Technology, Inc.Inventors: Alan G. Wood, William M. Hiatt, David R. Hembree
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Patent number: 7723831Abstract: A semiconductor package includes a substrate having contacts, and a discrete component on the substrate in electrical communication with the contacts. The package also includes a semiconductor die on the substrate in electrical communication with the contacts, and a die attach polymer attaching the die to the substrate. The die includes a recess, and the discrete component is contained in the recess encapsulated in the die attach polymer. A method for fabricating the package includes the steps of: attaching the discrete component to the substrate, placing the die attach polymer on the discrete component and the substrate, pressing the die into the die attach polymer to encapsulate the discrete component in the recess and attach the die to the substrate, and then placing the die in electrical communication with the discrete component. An electronic system includes the semiconductor package mounted to a system substrate.Type: GrantFiled: June 25, 2007Date of Patent: May 25, 2010Assignee: Micron Technology, Inc.Inventors: Chua Swee Kwang, Chia Yong Poo
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Patent number: 7721682Abstract: A system for producing, dispensing, using and monitoring a hydrogen enriched fuel includes a producing system configured to produce the hydrogen enriched fuel, a vehicle having an engine configured to use the hydrogen enriched fuel, and a dispensing system configured to store and dispense the hydrogen enriched fuel into the vehicle. The system also includes a fuel delivery system on the vehicle configured to deliver the hydrogen enriched fuel to the engine, and a control system configured to control the producing system and to monitor the use of the hydrogen enriched fuel by the vehicle. A method includes the steps of producing hydrogen gas and a hydrocarbon fuel, blending the hydrogen gas and the hydrocarbon fuel into the hydrogen enriched fuel, using the hydrogen enriched fuel in the engine, and tracking emissions during the producing step and during the using step.Type: GrantFiled: May 14, 2008Date of Patent: May 25, 2010Assignee: Eden Innovations Ltd.Inventors: Justin Fulton, Roger W. Marmaro, Gregory J. Egan
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Patent number: 7721799Abstract: A flow control packer (FCP) includes a packer mandrel, and an inflatable element fixedly attached at each end to the mandrel. The inflatable element includes circumferential grooves and flow control grooves formed on an outside surface thereof configured to press against the inside diameter of a conduit to provide a flow resistant surface for controlling the flow rate of a fluid through the conduit. A system can include one or more flow control packers (FCP) configured to control fluid flow through different sections of the conduit.Type: GrantFiled: October 6, 2007Date of Patent: May 25, 2010Assignee: Baski, Inc.Inventor: Henry A. Baski
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Patent number: 7717645Abstract: An adjustable physical structure for producing hydraulic formations for whitewater recreationalists includes a control structure, and an adjustable lip located downstream of the control structure. The control structure can include a crest and a ramp. The crest constricts and/or elevates (dams) the flow water to increase it's energy and focus the flow of water. Downstream of the crest, the ramp routes the flow of the water to the adjustable lip. The ramp can have varying and non-linear slopes and plan configurations. Additionally, the ramp can be static or adjustable to elevate the flow of water and vary the velocity and energy of the supercritical flow as it is passed to the adjustable lip. An adjustable invert physical structure comprises a shaped structure configured for placement on the invert of the channel. The adjustable invert physical structure can be moved or adjusted in horizontal and/or vertical directions to shape the flow of water.Type: GrantFiled: October 26, 2007Date of Patent: May 18, 2010Assignee: McLaughlin Consulting CompanyInventor: Richard Evan McLaughlin
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Patent number: D616385Type: GrantFiled: August 5, 2009Date of Patent: May 25, 2010Assignee: SemiLEDS Optoelectronics Co., Ltd.Inventors: Yung-Wei Chen, Wen-Huang Liu