Abstract: A liquid crystal display device includes laminated plural electrical field effect type liquid crystal layers with light-transmitting electrically insulating layers inserted therein, and liquid crystal injection holes for forming the columns for supporting the insulation layers and the liquid crystal layers. The structure of the liquid crystal display device is changed in the manner that the columns are striped so as to increase the width thereof and the liquid crystal injection holes are rod-shaped so as to increase the section width thereof. Accordingly, the gap of the liquid crystal layers is maintained and the etching time for dissolution layers is considerably reduced, thereby improving the structural quality of the liquid crystal display device and obtaining a uniformly displayed image.

Abstract: A digital servo system for servo controlling a prescribed function of a host device, e.g., the tracking servo function of an optical disk drive. The digital servo system includes a variable gain amplifier for amplifying an analog error signal issued by the host device, an A/D converter for converting the analog error signal to a digital error signal, an adder for adding a wobbling signal to the digital error signal to produce a composite digital error signal, digital signal processing circuitry for processing the composite digital error signal to produce a processed digital error signal, a D/A converter for converting the processed digital error signal to an analog servo control signal to be used in servo controlling the prescribed function of the host computer.

Abstract: A method for forming a pattern improves a profile of a resist pattern. The method forms a photoresist layer on a substrate having a step, and exposes the photoresist layer using a first mask. Then, thick portions of the photoresist layer are exposed using a second mask, and the entire resist is developed. The second mask provides an additional increment of energy to thick regions so that no inadequately exposed resist material will remain near the step.

Abstract: A compound semiconductor device is disclosed which comprises a crystally grown buffer layer formed on a semi-insulating semiconductor substrate provided with an insulating layer. The crystal growth characteristics are such that the insulating layer does not allow crystal growth on its upper surface. During its growth, the buffer layer makes reverse sloped side edges which join to form a void. A gate electrode formed above the void separates a channel from the substrate. In the .delta.-MESFET, side walls are formed at both sides of the gate electrodes and an N.sup.+ -well region is formed by using the side walls as an ion implanting mask. Accordingly, the void separates the channel from the semiconductor substrate, thereby preventing leakage current through the buffer layer, backgating effects in an integrated circuit, and completing crystal growth without an undue effort for lowering the impurity concentration of the buffer layer.

Abstract: An improved liquid crystal display device which has a clear contrast and satisfactorily good manufacturing processes, includes a plurality of first electrodes which are placed in a predetermined pattern and determine multiple pixel area and a plurality of second electrodes which are provided to be opposingly placed apart in a predetermined interval therewith; a liquid crystal layer to be filled tip between the electrodes: one or more insulation layers are provided in the liquid crystal layer, for forming multiple liquid crystal layers; columns for fixing the location of the insulation layers in the liquid crystal layer; and a protective insulation layer for protecting the electrodes. In the liquid crystal display device, the columns are made of black-colored materials for absorbing external light and are composed of multiple unit columns sequentially disposed up and down, with the insulation layer inserted therebetween.

Abstract: A manufacturing method for a thin film resistor is disclosed. An insulating layer is formed on a substrate having a contact region. The insulating layer above the contact region is removed by etching to expose the contact region. A metal layer and an interlayer are then formed in sequence on the surface of the structure. The metal layer and the interlayer above the region where the resistor will be formed is next removed, and then a resistor layer is formed on the surface of the structure. The thin film resistor is completed by etching away the resistor layer except for the predetermined region where the resistor is to be formed.

Abstract: A method of obtaining a multi-level liquid crystal device repeatedly applies a metal layer and then oxidizes a portion of that metal layer. Thereafter, the non-oxidized layers are removed, leaving empty layered spaces into which liquid crystal can be filled.

Abstract: A low-frequency oscillator whose duty ratio can be simply controlled includes a charging and discharging circuit for charging a capacitor via a constant current source and then discharging the capacitor according to a discharge control signal. A voltage comparator compares the voltage across the capacitor with a reference voltage. A monostable multivibrator, triggered by the output of the voltage comparator, generates the discharge control signal. The duration of the discharge is determined according to the RC time constant of the monostable multivibrator, to thereby generate a rectangular waveform having an accurately controlled duty ratio.

Abstract: A word line driving circuit for use in a semiconductor memory device having a first supply voltage terminal to which a pumping voltage higher than a supply voltage supplied from the exterior of a chip is applied and a second supply voltage terminal to which a ground voltage is applied includes a decoding circuit connected between the first supply voltage terminal and second supply voltage terminal, for receiving a decoded row address, a precharge circuit connected to an output terminal of the decoding circuit, a transfer circuit for receiving an output signal of the decoding circuit and a word line boosting signal, and a word line output circuit connected between the first supply voltage terminal and second supply voltage terminal, for driving a word line.

Abstract: A data output buffer of a semiconductor integrated circuit is operable in response to data input to data lines and comprises a first pull-down control circuit which generates a first pull-down signal in response to the data input to the data lines. A second pull-down control circuit generates a second pull-down signal in response to the data input to the data lines, the second pull-down signal being generated at a predetermined time after the first pull-down signal is generated and causing the first pull down signal to be deactivated. A first pull-down transistor shares an output node with a pull-up transistor and is responsive to the first pull-down signal to pull-down a predetermined amount of voltage at the output node. A second pull-down transistor is responsive to the second pull down signal for pulling down a residual amount of voltage at the output node.

Abstract: The present invention relates to a static random access memory device, which has a precharge circuit for precharging bit lines to a predetermined voltage level in response to a precharge signal, a memory cell connected to a word line and bit lines for storing data, a word line selection address generating device for selecting the word line, a bit line selection address generating device for selecting the bit line, a read control circuit having a shaping circuit controlled by a read enable signal for shaping a level of the data, a latch device for latching the data of the bit line to keep a predetermined logic threshold voltage corresponding to the shaping means, and a write control circuit connected to the bit lines for supplying data to the memory cell. The latch device is provided in the read control circuit and includes NOR gates whose output signals are crossly applied. Each of the NOR gates receives data having the first logic state and data having the second logic state.

Abstract: A process of manufacturing a semiconductor chip that has a connecting pad and is connected to a front side of a circuit board that has a conductive trace connected to a through-hole. An insulating adhesive layer, which has a hole corresponding to the pad, is interposed between the chip and the board so that the pad, the hole in the insulating layer and the through-hole in the board are aligned. A conductive material is applied into the through-hole from the back side of the board so as to fill the through-hole and connect the pad to the trace. The conductive material may be applied using a sputtering method, a screening method, an electroplating method or an evaporating method. The back side of the board is polished to remove conductive material which may have been applied on the back side of the board outside the through-hole.

Abstract: An input buffer particularly suitable for a semiconductor device includes a CMOS inverter for buffering an input signal which varies between first and second logic levels and producing an output signal at an output node thereof which is the logical inverse of the input signal, and a compensation circuit for compensating the output signal for fluctuations thereof which are due to fluctuations of a supply voltage. The CMOS inverter preferably includes a pull-up MOS transistor having a gate, a first electrode coupled to a supply voltage, and a second electrode, and a pull-down MOS transistor having a gate, a first electrode coupled to a reference voltage, and a second electrode.

Abstract: In a noise canceler, a pilot-canceling signal without noise is applied to the inverting input of a subtracter via a first MOS transistor. When a noise signal is present, a pilot signal and noise signal passing through a capacitor are applied to the inverting input port of the subtracter via a second MOS transistor to cancel the noise signal contained in the composite input signal. In the canceler, external noise may be digitally converted and the inverted noise thereof stored in a memory. When a noise signal detector detects the external noise, inverted data corresponding to the external noise is output from the memory. The detector enables an address generator to continuously generate addresses. The memory reads out inverted noise patterns which are converted into analog form and transmitted via a speaker, thereby canceling noises produced by various electrical and electronic appliances as well as nearby automobiles and aircraft.

Abstract: A word line boosting circuit and a control circuit therefor in a semiconductor integrated circuit are included. A word line boosting control circuit is connected to receive block select information selecting a first or second memory cell array block synchronized to a predetermined row address, and selectively generates first and second word line voltages.

Abstract: A manufacturing method for a thin film resistor is disclosed. An insulating layer is formed on a substrate having a contact region. The insulating layer above the contact region is removed by etching to expose the contact region. A metal layer and an interlayer are then formed in sequence on the surface of the structure. The metal layer and the interlayer above the region where the resistor will be formed is next removed, and then a resistor layer is formed on the surface of the structure. The thin film resistor is completed by etching away the resistor layer except for the predetermined region where the resistor is to be formed.

Abstract: An improved static random access memory device of the CMOS load memory cell type for storing one-bit information is capable of 4M bit or greater memory capacity. Each memory cell includes two transfer transistors, two driving transistors, and two load transistor elements. Each load transistor element is a PMOS thin film transistor and comprises a source formed of first and second conductive layers and connected to a constant power source line, and a drain also formed of the first and second conductive layers and connected to the drain of a corresponding one of the driving transistors. A channel region of each load transistor element is composed only along the region defined by the second conductive layer and a respective gate is formed of a third conductive layer which is separated from the channel region by a gate insulating layer.

Abstract: A signal noise reduction system including a main signal path which conducts a first signal, and an auxiliary signal path which conducts a second signal, the system comprising; a high-pass filter in the auxiliary signal path receiving second signal at an input terminal, a voltage-to-current converter, connected to the high-pass filter, an amplifier, connected to the voltage-to current converter, and an adder for combining the signals on the two signal paths to produce an output signal at an output terminal.

Abstract: A volume/balance control apparatus includes a plurality of resistance arrays which correspond to a plurality of channels, a volume operator and a balance operator which generate volume and balance signals according to user's operation, an operation signal synthesizing means for producing synthesized control signals pertinent to each channel by synthesizing the volume signal and balance signal, and a plurality of decoders for decoding the output from the operation signal synthesizing means and applying the result to a switching element included in each resistance array. The volume/balance control apparatus has only one resistance array per channel, thereby improving noise characteristics, and permits the independent operation of volume and balance controls, thereby enhancing user convenience.

Abstract: A method for manufacturing a double-cylindrical storage electrode of a capacitor of a semiconductor memory device, utilizes an outer etching mask for forming an outer cylinder and an inner etching mask for forming an inner cylinder. After forming a conductive structure on a semiconductor substrate, an outer etching mask for forming an outer cylinder and an inner etching mask for forming an inner cylinder are formed on the conductive structure. Then, the conductive structure is anisotropically etched using the outer and inner etching masks, thereby forming a double-cylindrical first electrode. Since a double-cylindrical storage electrode can be obtained from a single conductive layer, the influence of native oxidation circumvented. In addition, the double-cylindrical storage electrode of the capacitor according to the present invention decreases the risk of structural fragmenting because the electrode is obtained from one material layer, instead of a combination of layers as is conventionally-known.