Patents Represented by Attorney Suiter West PC LLO
  • Patent number: 6782523
    Abstract: The present invention is directed to a system and method for parallel configurable IP design. In an aspect of the present invention, a method may include receiving input parameters for a configuration by a common IP development environment. A unique combination of input parameters from the received input parameters is identified. At least one unique runtime file of the common IP development environment is initiated. The unique runtime file is derived from a common set of IP deliverables of the common IP development environment. At least one unique output file from the initiated unique runtime file is generated. The initiated unique runtime file and generated unique output file are unique so as to enable parallel implementation of the configuration specified by the received input parameter with at least one other configuration by the common IP development environment.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: August 24, 2004
    Assignee: LSI Logic Corporation
    Inventors: Randy DeGarmo, Sean Keller
  • Patent number: 6779987
    Abstract: An oilless high pressure pump suitable for use in devices such as pressure washers and the like is described. The pump includes an eccentric assembly suitable for converting rotary motion of a rotating shaft to rectilinear motion. One or more straps couple the eccentric assembly to a piston assembly. The straps communicate the rectilinear motion of the eccentric assembly to the piston assembly, reciprocating the piston assembly to pump the liquid.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: August 24, 2004
    Assignee: DeVilbiss Air Power Company
    Inventors: Shane Dexter, Allen Palmer, Mark W. Wood, William B. Daniel
  • Patent number: 6775818
    Abstract: A circuit, gate, or device parameter simulation includes data on the initial conditions of manufacture, including illumination conditions on a stepper, material parameters for processing conditions, and chip layout. Optical effects and processing tolerances may be accounted for in the simulation of the final device performance characteristics. The circuit, gate, or device parameter simulation may incorporate optical proximity code software. Simulated active and passive components are generated by the circuit, gate, or device parameter simulation from the simulated patterned layers on the substrate. Feedback may be provided to the circuit, gate, or device parameter simulation to optimize performance.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: August 10, 2004
    Assignee: LSI Logic Corporation
    Inventors: Kunal Taravade, Neal Callan, Nadya Strelkova
  • Patent number: 6775829
    Abstract: The present invention is directed to a method of building a custom software configuration, which may include receiving a first customer order for a first information handling system and a second customer order for a second information handling system. The first customer order including a first list of hardware configuration components and a first list of software configuration components and the second customer order including second list of hardware configuration components and a second list of software configuration components. At least one of the first list of hardware configuration components is different from the second list of hardware configuration components and the first list of software configuration components is different from the second list of software configuration components.
    Type: Grant
    Filed: August 2, 2000
    Date of Patent: August 10, 2004
    Assignee: Gateway, Inc.
    Inventor: James L. Kroening
  • Patent number: 6775630
    Abstract: The present invention is directed to a system and method for providing access to semiconductor manufacturing information. The present invention system and method allows users to interface with semiconductor characteristic data and to data associated with manufacturing conditions over a network. The system includes at least one input device for entering manufacturing data. A data storage device capable of storing the database of manufacturing data, including semiconductor characteristic data and manufacturing conditions is networked to the at least one input device. A plurality of remote devices suitable for interfacing with the data are networked to the storage device, such that the manufacturing data is provided to a website for access upon occurrence of failure event.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: August 10, 2004
    Assignee: LSI Logic Corporation
    Inventors: Nima A. Behkami, James W. Seale, Newell E. Chiesl, Mark A. Giewont, Robert B. Powell
  • Patent number: 6773717
    Abstract: The present invention provides improved chlortetracycline-containing animal feed compositions and processes and apparatuses for their preparation. In certain embodiments, raw fermentation broth comprising chlortetracycline is divided into two portions. The first portion is mixed with a compound that complexes chlortetracycline. The second portion is acidified and the solids are removed. The acidified liquid is treated with a complexing agent to produced a chlortetracycline complex. The first and second portions thus treated are then mixed and the mixture is passed on to a filter press or other means for separation of the solids to produce a wet cake comprising complexed chlortetracycline. In alternative embodiments, the second portion may be acidified and filtered and admixed with the first portion prior to the complexing step. The resulting mixture is passed on to a filter press or other means for separation of the solids.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: August 10, 2004
    Assignee: Pennfield Oil Company
    Inventor: Willis L. Winstrom
  • Patent number: 6772329
    Abstract: The present invention is a bus reset generator capable of asserting a reset upon detection of a desired phase. The bus reset generator may analyze control signals from a bus, and based upon the control signals may determine the current phase of the bus. If the current phase is the desired phase for a reset, then a reset may be asserted. If the current phase is not the desired phase, the bus reset generator may continue to find the desired phase.
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: August 3, 2004
    Assignee: LSI Logic Corporation
    Inventor: Andrew Hadley
  • Patent number: 6769923
    Abstract: A fluted signal pin provides expanded surface area for high frequency operation which minimizes inductive and capacitive effects. The signal pin may be mounted to a circuit board via a support stanchion or membrane during assembly or repair. The membrane may be permanent or removable by heat, water, and/ or detergent. A pin cap optionally is provided to ensure attachment to an overlying integrated circuit package.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: August 3, 2004
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6769097
    Abstract: The present invention is directed to a scale-invariant topology and traffic allocation in multi-node system-on-chip switching fabrics. A method for allocating resources in a design of an integrated circuit may include receiving resource data for components of an integrated circuit. The resource data is suitable for indicating consumption by the components of at least one resource. Integrated circuit resources for the components of the integrated circuit are allocated according to a power law distribution as applied to the received resource data.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: July 27, 2004
    Assignee: LSI Logic Corporation
    Inventor: Christopher L. Hamlin
  • Patent number: 6765806
    Abstract: The present invention is directed to a composition with electromagnetic compatibility (EMC) characteristics. In an aspect of the present invention, an adhesive suitable to provide a bond between components may include an adhering material suitable for holding a first surface and a second surface in contact. A plurality of items is disposed in the adhering material. The plurality of items has electromagnetic capability shielding characteristics.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: July 20, 2004
    Assignee: LSI Logic Corporation
    Inventor: Barry Caldwell
  • Patent number: 6766466
    Abstract: A method for isolating SAN Fibre Channel faults in both laboratory and customer site environments, thereby reducing or eliminating uncertainty typically involved in isolating faulty components and decreasing fault isolation time is disclosed. The method provides multiple levels of analysis including providing diagnostic information for a component within the SAN Fibre Channel environment, the diagnostic information being suitable for indicating a fault of the component; analyzing the diagnostic information for determining a cause of a fault indicated by the diagnostic information; and furnishing a possible cause of the fault indicated by the diagnostic information based on analysis of the provided diagnostic information. In exemplary embodiments, the method may be implemented by a Fibre Channel fault isolator coupled to the SAN.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: July 20, 2004
    Assignee: LSI Logic Corporation
    Inventor: Mahmoud K. Jibbe
  • Patent number: 6766463
    Abstract: A method and system for controlling and normalizing a rate of a process is described. A hidden process is executed a predetermined number of times as a loop value, and a visual process is executed to complete a cycle. The time to complete a cycle is measured, and an updated loop value is calculated. In a subsequent cycle, the hidden process is executed a number of times equal to the updated loop value so that the visual process is executed at a desired rate normalized across all computing platforms, configuration, and performance environments. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other researcher to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: July 20, 2004
    Assignee: LSI Logic Corporation
    Inventor: Andrew Hadley
  • Patent number: 6761899
    Abstract: A medicated animal feed additive in a solid particulate or granular form having improved resistance to powdering and good fracture toughness is provided. The animal feed additive according to the present invention does require a compression or compacting step to achieve its solid structural form. The present invention also provides a method of producing animal feed compositions. In a further embodiment, the present invention relates to a method of combating microbial infection in animals comprising orally administering to said animals a prophylactic or therapeutic amount of an animal comestible composition comprising a medicated feed supplement according to the present invention.
    Type: Grant
    Filed: July 9, 1999
    Date of Patent: July 13, 2004
    Assignee: Pennfield Oil Company
    Inventors: Andrew Lee Winstrom, Willis L. Winstrom
  • Patent number: 6760827
    Abstract: A method for augmenting the memory capabilities of an option ROM in which PCI function calls are used to access a larger sized non-volatile memory. Thirty two bit addressing is used in the PCI function call routines to allow for 4 GB addressing. An option ROM and the separate larger sized non-volatile memory or a single non-volatile memory may be used for storing the overflow images.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: July 6, 2004
    Assignee: LSI Logic Corporation
    Inventor: Derick G. Moore
  • Patent number: 6757881
    Abstract: The present invention is directed to power routing with obstacles. A method for determining strap location for power routing in an integrated circuit may include receiving input parameters, the input parameters including a number N indicating a number of straps to be located, wherein a strap of the number of straps is denoted as i. An initial strap placement is found for 1 through N straps and strap placement is calculated by relocating a strap if an obstacle is encountered in an initial strap placement, the relocated strap utilized to relocate at least one other strap of the 1 through N straps. Strap placement may be calculated by employing a local gradient method, dynamic programming, and like methods as contemplated by a person of ordinary skill in the art without departing from the spirit and scope thereof.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: June 29, 2004
    Assignee: LSI Logic Corporation
    Inventors: Alexandre E. Andreev, Lav D. Ivanovic, Ivan Pavisic
  • Patent number: 6754605
    Abstract: The present invention is directed to a method and system for automating data storage array components testing. A serial number of a data storage array component (i.e., product) is used to determine if the product is of high priority (rank) in comparison with other products in a queue and there is any test cell available for testing the product. Next, if a test is required, the product type and test requirements of the product are retrieved from a database based on the serial number, and the product is routed to the test cell from an assembly line. Then the product and a storage component interface module of the test cell are positioned so that the product and the storage component interface module face each other. The storage component interface module is chosen based on the test requirements retrieved from the database. Next the product is docked into the storage component interface so that the product is connected to the storage component interface module. Then the test is run to completion.
    Type: Grant
    Filed: April 15, 2003
    Date of Patent: June 22, 2004
    Assignee: LSI Logic Corporation
    Inventors: James D. Pate, Justin B. Mortensen, Steven G. Hagerott
  • Patent number: 6754631
    Abstract: A method and system for memorializing a conversation of a plurality of speakers are disclosed. A sample utterance of each of the plurality of speakers is sampled thereby producing a file of sample utterances each having a characteristic corresponding to one of the speakers. A characteristic of the sample utterances is associated with the corresponding speaker, and the conversation is recorded and saved to a storage medium. A speaker is identified by matching the characteristic of the sample utterance with the conversation utterance, and information regarding the identified speaker is associated with the conversation utterances. A transcript of the conversation is generated that includes information regarding the speaker with a corresponding utterance.
    Type: Grant
    Filed: November 4, 1998
    Date of Patent: June 22, 2004
    Assignee: Gateway, Inc.
    Inventor: Salah U. Din
  • Patent number: 6751783
    Abstract: The present invention provides a comprehensive design environment defining a system architecture and methodology that may integrate interconnects, cores, ePLC, re-configurable processors and software into a manageable and predictable system designs that achieve on-time system IC design results meeting desired specifications and budgets. For example, an interscalable interconnect maybe provided that is scalable and isochronous capable. Additionally, an abstract language may be provided to be able to describe interconnecting core functions. Further, a self-progrmnmable chip may be provided that, upon receiving a construct, it could program itself to achieve the desired functionality, such as through the use of on-chip knowledge and the like.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: June 15, 2004
    Assignee: LSI Logic Corporation
    Inventors: Michael Eneboe, Christopher L. Hamlin
  • Patent number: 6750668
    Abstract: A vortex unit suitable for providing a desired environment for a semiconductor process may include a vortex tube and a semiconductor processing device suitable for performing a semiconductor processing function. The vortex tube includes an air inlet for receiving compressed air, a first air exhaust for outputting an air stream having a temperature greater than the received compressed air, and a second air exhaust for outputting an air stream having a temperature lower than the received compressed air. The semiconductor processing device is connected to the second air exhaust of the vortex tube so that the semiconductor processing device receives a cooled air stream from the vortex tube, the cooled air stream providing an environment suitable for enabling the semiconductor processing device to perform the semiconductor processing function.
    Type: Grant
    Filed: October 17, 2001
    Date of Patent: June 15, 2004
    Assignee: LSI Logic Corporation
    Inventor: Brad Johnson
  • Patent number: 6751750
    Abstract: The present invention is directed to a method of recovering a write ahead log after an interruption. In a first aspect of the present invention, a method of writing a log entry of a write ahead log may include initiating a log write to a write ahead log, the write ahead log having a first sector, and a second sector, wherein the first sector is followed by the second sector. A log entry including a sequence number is written to the second sector. Then, the log entry including the sequence number is written to the first sector.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: June 15, 2004
    Assignee: LSI Logic Corporation
    Inventor: Donald R. Humlicek