Abstract: An etching residue removal method includes a cleaning sequence. Preferably, the cleaning sequence has a first washing processing, first drying processing, stripper processing, rinsing processing, second washing processing and second drying processing. In the first washing processing, an insulation film and metal lines thereon are washed by pure water. In the first drying processing, the insulation film and metal lines are dried in a nitrogen atmosphere at room temperature, for example. In the stripper processing, the etching residue on the insulation film and metal lines are stripped by amine stripper, for example. In the rinsing processing, the insulation film and metal lines are rinsed with an IPA rinse solution, for example. In the second washing processing, the insulation film and metal lines are washed with pure water. In the second drying processing, the insulation film and metal lines are dried in the nitrogen atmosphere at room temperature, for example.

Abstract: An insulating film layer is formed between a channel region of an MOS element formed in a monocrystal silicon layer of an SOS substrate in which the monocrystal silicon layer is laminated on a sapphire substrate, and the sapphire substrate, thereby to bring a stress state of the monocrystal silicon layer on the insulating film layer into a tensile stress state.

Abstract: A sense signal outputted from a sensor element and a reference voltage having a constant voltage level are selectively inputted to an amplifier, and amplified signals thereof are sequentially outputted as A/D-converted data by an A/D converter. An average of a predetermined number of A/D-converted data corresponding to the reference voltage is calculated, and a correction value is obtained by subtracting the average from one of the A/D-converted data corresponding to the reference voltage. Corrected data is obtained by subtracting the correction value from each A/D-converted data corresponding to the sense signal outputted from the sensor.

Abstract: A semiconductor device includes a semiconductor chip having electrode pads, and a rewiring pattern having interconnects which are connected to the electrode pads and extend over an insulation film. The semiconductor device also includes columnar electrodes each of which has a main body section and a protrusion section, and a sealing section which has a top face having a height the same as the top faces of the protrusion sections. The semiconductor device also includes solder balls formed on the protrusion sections. The semiconductor device also has trenches in the sealing section. Each trench has a depth which reaches the boundary between the main body and protrusion of the electrode. The side faces of the protrusion section are exposed face defined by the trenches. Each solder ball is electrically connected to the top face and side faces of the protrusion section of each electrode.

Abstract: A resonator that can alleviate restrictions in usage and design due to the bias voltage dependency and for which usage and design conditions can be easily determined, includes a movable electrode opposite and sandwiching the fixed electrode, and an extension of the fixed electrode or the movable electrode that extends along a plane crossing the opposite surfaces of the fixed electrode and the movable electrode. With being displaced vertically relative to the fixed electrode, the movable electrode is vibrated.

Abstract: A gate array of a semiconductor substrate on which plural unit cells are arranged in parallel, the unit cells having the same pattern that includes a source potential region VDD, a PMOS, an NMOS and a ground potential region GND. Metal wiring lines being formed, with an insulating layer between, on the unit cells, with contacts that make electrical connection between the metal wiring lines and the unit cell transistors. The gate wiring of a transistor in a non-used unit cell is used in place of a metal wiring line. By doing so, the area of metal wiring lines in a gate array is reduced and the array wiring efficiency is increased.

Abstract: A multi-band low noise amplifier (LNA) includes multiple low noise amplifying circuits configured to selectively operate in corresponding frequency bands. The low noise amplifying circuits include corresponding amplifying units and degenerating units. The degenerating units include first inductors, which are arranged in loop patterns isolated from each other on a same layer, such that one first inductor surrounds at least one other first inductor. A current flows through a selected first inductor included in a selected low noise amplifying circuit of the low noise amplifying circuits.

Abstract: A stack of communicating trays for cultivation of cells, whereby the tray stack is equipped with a gas exchanger having at least one processed aperture for fast and substantially uniform distribution of gas to the trays.

Abstract: A semiconductor package comprises a package board and a plurality of semiconductor chips sequentially stacked on the package board. Each of the semiconductor chips comprises a semiconductor substrate and an open loop-shaped chip line formed on the semiconductor substrate. The open loop-shaped chip line has first and second end portions. The first and second end portions of the open loop-shaped chip lines are electrically connected to each other by connectors, and the connectors and the open loop-shaped chip lines constitute a spiral antenna.

Abstract: A semiconductor device includes a semiconductor substrate and a capacitor which is disposed on a principal surface of the semiconductor substrate. The capacitor includes a lower electrode film disposed on the principal surface of the semiconductor substrate, a dielectric film disposed on the lower electrode and an upper electrode film disposed on the dielectric film. The semiconductor device further includes an interconnection film which includes a portion disposed on the upper electrode film so as to be electrically coupled to the upper electrode film. Directions of residual stresses of the upper electrode film coincide with directions of residual stresses of the portion of the interconnection film. Each of the upper electrode film and the interconnection film may include at least one of platinum and iridium. Also, there is provided a method of manufacturing the semiconductor device.

Abstract: A current source device having a plurality of current output circuits each including a current output FET, first and second switch FETs respectively series-connected to source and drain sides of the current output FET to form a series circuit, a source voltage supply which applies a positive-side potential of a source voltage to the first switch FET and applies a negative-side potential of the source voltage to the second switch FET to supply the source voltage to the series circuit, and an output terminal connected between the current output FET and the second switch FET; and a gate voltage supply circuit which supplies a common gate voltage to the gates of the current output FETs, wherein each of the current output circuits further includes a third switch FET provided between the current output FET and the second switch FET.

Abstract: A non-volatile memory device includes a semiconductor substrate, first and second control gates, and first and second charge storage patterns. The semiconductor substrate includes a protruding active pin having a source region, a drain region and a channel region located between the source and drain regions. The first control gate is located on a first sidewall of the channel region, and the second control gate is located on a second sidewall of the channel region. The second second control gate is separated from the first control gate. The first charge storage pattern is located between the first sidewall and the first control gate, and the second charge storage pattern is located between the second sidewall and the second control gate.

Abstract: A programmable variable gain amplifier includes at least three amplifiers. A first amplifier is configured to amplify an input signal. A second amplifier, which includes a programmable output load stage, is configured to receive an output signal from the first amplifier and to output a first differential output signal. The output load stage includes multiple first switches and multiple first diode-connected transistors that are open-circuited or short-circuited by the first switches. A third amplifier, which includes a programmable current mirror input stage, is configured to receive the first differential output signal from the second amplifier through the current mirror input stage and to output a second differential output signal. The current mirror input stage includes multiple second switches and multiple second transistors that are open-circuited or short-circuited by the plurality of second switches.

Abstract: An apparatus for selection of characters to be displayed on a display screen. Has input actuators with associated fields containing graphical symbols representing the characters. The user is guided during selection of a character via the display. The selection procedure is sufficiently simple to allow a user to memorise the steps needed in order to select a specific character. Uses a limited number of actuators, and a character is selected using a sequence of actuations. Actuations may e.g. be keystrokes or movement by tactile pointing means on a touch sensitive device. Preferably, a character is selected by drawing one or two linear segments on a touch sensitive device. The displayed graphical symbols are preferably rearranged upon actuation. Suitable for use in electronic devices, in particular hand held devices having a small display screen, such as communication equipment, such as portable phones, e.g. mobile phones, or computers.

Abstract: A reference current generating apparatus is provided which is capable of generating a reference current having no temperature dependency, without increasing a layout area. The reference current generating apparatus includes a constant current generating circuit having a differential amplifier, a constant current generating circuit connected to the constant current generating circuit and having a differential amplifier, and an output circuit connected to the constant current generating circuit for outputting first and second reference voltages. The constant current generating circuit generates a reference current by enabling selection of a mirror ratio of a transistor that conducts summing of a constant current proportional to a thermal voltage, and by enabling switching of a dividing voltage from a resistor to an input of the differential amplifier, to generate a constant current proportional to a diode voltage via a high impedance MOS gate.

Abstract: A single transistor floating-body dynamic random access memory (DRAM) device includes a floating body located on a semiconductor substrate and a gate electrode located on the floating body, the floating body including an excess carrier storage region. The DRAM device further includes source and drain regions respectively located at both sides of the gate electrode, and leakage shielding patterns located between the floating body and the source and drain regions. Each of the source and drain regions contact the floating body, which may be positioned between the source and drain regions. The floating body may also laterally extend under the leakage shielding patterns, which may be arranged at outer sides of the gate electrode.

Abstract: An acceleration sensing device includes a movable sensing member, a frame member and a supporting member. The supporting member is coupled between the movable sensing member and the frame member so as to support the movable sensing member. The acceleration sensing device further includes a covering member disposed above the movable sensing member, with a gap between the covering member and the movable sensing member. The acceleration sensing device still further includes internal electrodes, interconnection films, external electrodes and a resin film. The internal electrodes are arranged around the covering member. The interconnection films are disposed on the frame member so as to be coupled to the internal electrodes. The external electrodes are disposed on the interconnection films. The resin film is disposed on the frame member so as to seal the covering member.

Abstract: An image sensor includes a light receiving device in a substrate, a color filter over the light receiving device, a buffer film over the color filter, and a microlens on the buffer film. The microlens has a concave bottom face and a convex top face. The buffer film has a substantially flat top outside the microlens and has a convex top face below the microlens.

Abstract: A nonvolatile memory device includes a stack-type memory cell array, a selection circuit and a read circuit. The memory cell array includes multiple memory cell layers and a reference cell layer, which are vertically laminated. Each of the memory cell layers includes multiple nonvolatile memory cells for storing data, and the reference cell layer includes multiple reference cells for storing reference data. The selection circuit selects a nonvolatile memory cell from the memory cell layers and at least one reference cell, corresponding to the selected nonvolatile memory cell, from the reference cell layer. The read circuit supplies a read bias to the selected nonvolatile memory cell and the selected reference cell corresponding to the selected nonvolatile memory cell, and reads data from the selected nonvolatile memory cell.

Abstract: A flash memory device includes a cell array and a voltage supplying and selecting portion. The cell array includes multiple word lines, and the voltage supplying and selecting portion is configured to generate at least two different voltages to be supplied to the word lines of the cell array during an erase operation.