Abstract: A method and structure for testing an A to D converter containing a plurality of discrete components is provided. The testing methodology includes dividing the circuit into a number of segments of the discrete components (for testing purposes only) with each segment having the same number of discrete components or an unequal but known number of discrete components. The value of the components individually and collectively of each segment is tested and compared with the value of the corresponding components of at least one other segment, and an output signal is generated of the compared value of the segments being tested. Preferably, the components are in a ladder configuration and are either resistors or capacitors.

Abstract: The bond strength between a semiconductor chip and a metal heat sink in an integrated circuit package can be improved by using an adhesive system comprising two separate layers, one layer exhibiting preferential bonding strength for the chip and the other layer exhibiting preferential bonding strength for the metal heat sink.

Abstract: According to the present invention, an improved photoimagable cationically polymerizable epoxy based solder mask is provided that contains a non-brominated epoxy resin system and from about 0.1 to about 15 parts, by weight per 100 parts of resin system, of a cationic photoinitiator. The non-brominated epoxy-resin system has solids that are comprised of from about 10% to about 80% by weight, of a polyol resin having epoxy functionality; from about 0% to about 90% by weight of a polyepoxy resin; and from about 25% to about 85% by weight of an difunctional epoxy resin. Since the photosensitive cationically polymerizable epoxy based solder mask does not contain bromine, it is particularly advantageous halogens in waste processing chemicals or in incinerated scrap circuit boards are regulated by environmental concerns. The photosensitive cationically polymerizable non-brominated epoxy based solder mask has a glass transition temperature greater than about 100° C., preferably greater than about 110° C.

Abstract: A method is provided for selectively metallizing one or more three-dimensional materials in an electronic circuit package comprising the steps of forming a layer of seeding solution on a surface of the three-dimensional material of interest, exposing this layer to light of appropriate wavelength, resulting in the formation of metal seed on regions of the three-dimensional material corresponding to the regions of the layer of seeding solution exposed to light; removing the unexposed regions of the layer of seeding solution by subjecting the exposed and unexposed regions of the layer of seeding solution to an alkaline solution. Thereafter, additional metal is deposited, e.g., plated, onto the metal seed using conventional techniques. Significantly, this method does not involve the use of a photoresist, or of a corresponding chemical developer or photoresist stripper.

Abstract: The method for forming circuitization of the present invention provides a circuitized product which does not have a blanket seed layer and only has seed layer under the metal circuitization. Thus, short circuits between circuit lines are eliminated. It is a further advantage of the method of the present invention that it does not involve stripping portions of the seed layer. The method of the present invention requires less processing steps than conventional methods and employs positive resists which are developable by aqueous alkaline solutions.

Abstract: A memory module comprising: a plurality of memory devices associated with the module; each of said memory devices being configured in M banks; and a logic circuit for configuring the memory module to operate in a programmable addressing mode; said logic circuit receiving a number of address inputs and a number of bank address signals from a memory controller with said address inputs and bank address input signals corresponding to N bank memory devices; said logic circuit re-mapping at least one of said address inputs as an additional bank address signal to the memory device.

Abstract: A method of forming a printed circuit board or circuit card is provided with a metal layer which serves as a power plane sandwiched between a pair of photoimageable dielectric layers. Photoformed metal filled vias and photoformed plated through holes are in the photopatternable material, and signal circuitry is on the surfaces of each of the dielectric materials and connected to the vias and plated through holes. A border may be around the board or card including a metal layer terminating in from the edge of one of the dielectric layers. A copper foil is provided with clearance holes. First and second layers of photoimageable curable dielectric material is disposed on opposite sides of the copper which are photoimageable material. The patterns are developed on the first and second layers of the photoimageable material to reveal the metal layer through vias. At the clearance holes in the copper, through holes are developed where holes were patterned in both dielectric layers.

Abstract: Methods of filling apertures, for example, through holes, in substrates are provided. The methods utilize a dielectric film, preferably a photoimageable dielectric film, which is employed to fill the apertures and to form a dielectric film disposed above the substrate at the same time. As a result, the aperture fill material is the same as, and indeed continuous with, the dielectric film which is disposed on the substrate. The method employs the following steps: providing a substrate having apertures; providing a dielectric film disposed on the substrate covering the apertures, reflowing the dielectric film to flow into the apertures and to form a dielectric film adherent to the substrate, to provide a continuous dielectric extending from the dielectric film into the apertures. In certain embodiments, after filling, additional apertures, such as vias, are photoimaged in the dielectric film. Preferably the vias are then metallized, and circuitry formed atop the dielectric film.

Abstract: A technique of forming a metallurgical bond between pads on two surfaces is provided. A metal coating placed on each surface includes a first metal base layer and a second metal surface layer. The first and second metals include a low melting point constituent. A first ratio of the two metals forms a liquid phase with a second ratio of the two metals forming a solid phase. The volume of the base layer metal exceeds the volume necessary to form the solid phase between the base metal and the surface metal. Conductive metal particles are provided having a core metal and a coating metal dispersed in an uncured polymer material, at a volume fraction above the percolation threshold. The core metal and the coating metal together include a low melting point constituent. At a first ratio the components form a liquid phase and at a second ratio the two components form a solid phase.

Abstract: A technique for forming an organic chip carrier or circuit board, having two voltage planes and at least two signal planes is provided which includes bonding a first layer of photolithographic dielectric material to a first metal layer and exposing the first layer of dielectric material to a pattern of radiation to provide at least one opening through the first layer of the dielectric material. A second metal layer is bonded to the first layer of photoimageable material on the opposite side from the first metal layer. Holes are etched in the first and second metal layers which correspond to and are larger than each of the patterns on said openings in the first layer of dielectric material. The exposed pattern on the first layer of dielectric material is then developed, with the openings in the first and second metal layers being larger than the corresponding developed opening in the first dielectric material.

Abstract: A method provides for additive plating on a subcomposite having filled plated through holes. Fine-line circuitry is achieved via electroless deposition onto a dielectric substrate after the through hole is plated and filled. Fine-line circuitry may be routed over landless, plated through holes thereby increasing the aspect ratio and the available surface area for additional components and wiring.

Abstract: A method and device for attaching a module having a ball grid array or column grid array of solder material thereon arranged in a given pattern or footprint to a substrate having an array of connector pads arranged in the same pattern is provided. A preformed alignment device has an array of through holes therein aligned in the same pattern or footprint as the ball grid array or column pattern on the module and the pattern of contact pads on the substrate. The through holes in the preform are filled with a solder material which can be either a solder paste or a solid solder or with a curable conductive adhesive. The solder preferably is a lead-tin eutectic, but in any event has a melting point of less than about 240° C. and in the case of the conduction adhesive, will cure below about 240° C. The preform with the filled through holes is interposed between the module and the substrate with the material in the holes in contact with the solder balls or columns and the contact pads.

Abstract: The present invention permits solder joints to be made directly to via and through holes without the solder being wicked into the vias or through holes, by filling plated through holes with an epoxy or cyanate fill composition. When cured and overplated, the fill composition provides support for the solder joint and provides a flat solderable surface for the inter-connection. In certain embodiments, the cured fill compositions, offer a further advantage of being conductive. The invention also relates to several novel methods for filling through holes with such fill compositions, and to resistors located in through holes and vias.

Abstract: A method for attaching adherent metal components, particularly a copper film, on at least one surface of a polyimide substrate is provided. The method comprises the steps of: exposing at least one surface of the polyimide substrate to a reactive gas plasma that provides a level of ion bombardment of the polyimide surface sufficient to disrupt at least a portion of the imide groups on the surface and to form reactive carboxylate groups, carbonyl groups and other carbon-oxygen functional groups on the surface; and then depositing a metal film onto the chemically-modified surface without intervening exposure to air. The present invention also provides a copper-coated polyimide product comprising a polyimide substrate having a substantially smooth and chemically-modified surface and a copper film directly attached to the surface, i.e., the product is free of a polymeric adhesive layer or tie coat between the surface of the polyimide substrate and the copper film.

Abstract: A method and structure for decoding n input signals and their complements to one of m output signals is provided. A capacitive network is provided having m output nodes. The output nodes are precharged to a given voltage value. N input signals and their complements are provided each having either a high value or a low value. At least one but less than all of the output nodes are discharged to a value less than the given voltage but greater than ground in output patterns responsive to given input patterns of the true and complement values of the input signals. The output patterns of the discharged nodes is such as to provide one and only one discharged or one and only one undischarged node for any given pattern of input signals. Preferably the capacitive network includes NMOS inversion capacitors.

Abstract: A method of recovering benzyl alcohol, gamma butyrolactone, or propylene carbonate from an impure effluent stream of an industrial process is provided. The effluent waste stream contains greater than about 10 percent by weight of monomeric units that are reacted to form larger oligomers and polymers. The first step in the recovery process involves polymerizing the monomeric units present in the effluent waste stream under conditions effective to reduce the concentration of monomeric units in the waste stream to less than about 10 weight percent. The waste stream then is fed to a first separation stage where it is separated into (i) a gaseous stream of water, soluble gases, and volatile contaminants and (ii) a suspension comprising the high boiling solvent, semi-volatile materials, and non-volatile contaminants and materials. Then the dewatered, low vapor pressure, high boiling solvent-containing suspension is either distilled or evaporated to separate the high boiling solvent from non-volatile materials.

Abstract: A memory card design which adds parity for non-parity computer systems to supply error detection capabilities is provided. The apparatus includes a memory card, parity DRAM locatable on the memory card, logic for generating and checking parity bits and logic for the control of the generating, checking and storing parity bits. Also, in another embodiment, the apparatus adds error correction code to the memory card to provide error detection and correction code to systems lacking such capabilities.

Abstract: The present invention provides a new device and technique for enhancing the electrical properties of the thick metal backer/adhesive bond/ground plane interface. The enhanced electrical properties are obtained by micro-roughening a connection surface of the thick metal backer prior to forming the thick metal backer/adhesive bond/ground plane interface.

Abstract: An improved photoimagable cationically polymerizable epoxy based coating material is provided, that is suitable for use on a variety of substrates including epoxy-glass laminate boards cured with dicyandiamide. The material includes an epoxy resin system consisting essentially of between about 10% and about 80% by weight of a polyol resin which is a condensation product of epichlorohydrin and bisphenol A having a molecular weight of between about 40,000 and 130,000; and between about 35% and 72% by weight of an epoxidized glycidyl ether of a brominated bisphenol A having a softening point of between about 60° C. and about 110° C. and a molecular weight of between about 600 and 2,500. Optionally, a third resin may be added to the resin system. To this resin system is added about 0.