Abstract: A semiconductor read/write memory comprised of an array of cells, each having a single active element that is a IGFET device formed in a recess with one source or drain region located directly above and its other source or drain region located within a buried storage capacitor. The gate of each device is connected to an address line in the array, and transverse diffused bit lines interconnect the drains of the devices in aligned and spaced apart cells. Voltage applied via an address line activates a gate to charge its buried capacitor and store a signal when its connected bit line is also activated. Readout of stored charges is controlled by the address line through the connected bit line in the conventional manner.

Abstract: A breakdown preventing protection structure for an insulated gate field effect semiconductor device is disclosed for limiting input voltages to levels not substantially exceeding the supply voltage. A planar insulated gate field effect protection transistor is provided in series with the input. The protection transistor includes a source forming the circuit input, a drain connected to the gate of the device to be protected, and a gate electrode connected to the supply voltage which also supplies the device to be protected. A shunting protective diode may be included at the source of the protection transistor to limit negative input voltages to the diode threshold voltage and positive input voltages to the reverse avalanche breakdown of the protective diode. The protection circuit is particularly well suited to protect V-groove metal oxide semiconductor devices which have breakdown voltages well below breakdown voltages of conventional planar MOS transistor devices.

Abstract: A method for combining a semiconductor device with a printed circuit board or substrate which eliminates the need for conventional semiconductor packaging and connectors for same on the board and thereby makes possible a relatively small and thin assembly adaptable for space limited electronic products. The semiconductor device is fixed to a carrier which is installed and secured within a hold in the circuit board. Terminal pads of the device are wire bonded to terminals on the substrate, and the connecting wires and die are completely encapsulated within a plastic material.

Abstract: In a metal oxide silicon memory device having an array of static memory cells, a sense amplifier for detecting signals produced by the cells connected between complementary bit lines. The amplifier includes a translator section that shifts the normally high bit and bit voltage levels to a lower voltage level at the control gates of signal output devices connected to output bus lines. Each output bus line has only a single device impedance to ground rather than the normally required stacked or series arrangement of control elements. This provides a low impedance to ground for one of the output bus lines whle the signal variation around threshold provides a relatively high impedance to ground on the other bus line, thereby providing fast response times.

Abstract: A visual tuning-aid system for aligning an electronic timepiece to a correct reference frequency is disclosed. A reference oscillator in the system provides a reference signal at a precisely fixed predetermined frequency which is, or is converted to, the correct alignment frequency for the timepiece. A sensor electrostatically detects a time base signal in the timepiece and a bandpass amplifier removes any extraneous signals. The reference signal and the time base signal are provided to a phase shift indicating device of a multiphase motor in the system which provides a visual display, the movement of which is proportional to the rate of phase change between the reference signal and the time base signal. Alignment of the timepiece to the correct frequency stops the phase change and thereupon the visual display stops moving.

Abstract: An initializing circuit for automatically providing a pulse of a duration sufficient to initialize all the relevant storage elements in an electronic calculator computing system having one or two power supplies. It comprises a power-on pulse generator controlled by two phase clock buffers utilizing a feed-back loop including a bit of delay to guarantee a minimum of one bit time duration for the power-on level. The two phase clock buffers are activated at turn-on to remain in a steady state by a power-on level detecting sub-circuit to control the pulse generator. When a one bit pulse is insufficient to initialize the system, a flip-flop and a counter may be used to generate a longer pulse.

Abstract: An assembly of electronic components and a method of packaging such components to form a solid state time-keeping device capable of being housed in watch cases having different external configurations. The assembly includes a sub-assembly component which combines and interconnects an integrated semiconductor device with other discrete elements required to perform basic timing function in a compact package. This sub-assembly and the various other electronic components are readily removable and interchangeably replaceable with simple jeweler's hand tools.

Abstract: A multi-position switch particularly adaptable for an electronic watch comprises a movable plate or disk mounted within a cup-like body and rotatable about an axis to different positions for accomplishing various setting or operating modes. Fixed contacts on the inside of the switch plate are spaced apart but electrically connected so that when the plate is rotated to certain positions relative to its central axis the contacts are aligned for engagement with a particular pair of a series of terminals located on the inside planar surface of the switch body and connected through the body to the internal circuitry of the device. The interconnection of certain pairs of terminals accomplished by the contacts activates internal circuitry of the device to produce the desired operating function or mode.