Abstract: Optimal baud rate and carrier frequency for data transmission using a modem on a communication channel (100) are determined by utilizing an on-line line probing technique. The technique utilizing the information from a decoder noise power spectrum estimated from the equalized received modulated signals and decoder output symbols to determine the decoder signal-to-noise ratios (SNRs) and supported bit rates for the available baud rates and carrier frequencies. These SNRs and bit rates together with a band edge SNR difference at each frequency band are utilized to select (110) the optimal baud rate and carrier frequency.

Abstract: Automatically restoring data transmission by monitoring line degradation and switching to a new line (or lines) when line quality falls below a prescribed standard. Data transmission is maintained on the leased line while communication is being established on the dial line, so as not to disrupt data transmission; communication is established across two dial lines to restore full-duplex transmission; energy is maintained on the dial lines at times when data is not being transmitted to prevent a change of channel on a dial line; a signal processor, associated memory, and analog interface circuitry provide the data restoral functions; control of the restoral procedure is handled by one modem (e.g., the calling modem), and commands are sent to the other modem over either the leased or dial lines.

Abstract: Measuring the programming resistor in a data jack by placing the resistor in an AC voltage divider circuit via a transformer. An AC voltage (preferably generated by the modem's own transmitter circuitry) is applied to the voltage divider circuit, and an AC voltage measurement (preferably made by the modem's A/D converter) provides the resistance of the programming resistor. Matching the low-pass filter impedance characteristic of a local loop with a network having a matching low-pass filter characteristic, while also compensating the received signal with a compensation network having a high-pass filter characteristic, to reduce the frequency dependent gain effects caused by the matching network and/or the local loop.

Abstract: A first set of plated-through holes in the printed circuit board (PCB) are covered by a protective solder mask on the solder side of the PCB while a second set of plated-through holes are exposed. Electrical components are disposed on the component side with leads inserted in the second set of holes. Solder is prevented from flowing into the first set of holes during wave soldering by the mask covering. Conductive pins designed for press fitting into the first set of holes are inserted therethrough to define connecting pins on each side of the PCB following wave soldering. This permits both a wave soldering and press fit operation to be accommodated.

Abstract: A self-adjusting phase-locked loop (PLL) parameter adjusting device (APAD) (100) and method that automatically adjusts a phase-locked loop to provide tracking ability when and where needed, as opposed to utilizing a PLL adjusting device with preset parameters, thus maintaining minimal possible noise bandwidth. The method utilizes (1) successively integrating the PLL error output signal over a number of samples to provide a plurality of sums, (2) checking a predetermined number of sums and recording and counting the sign of each sum, (3) comparing the counted record to a predetermined threshold value, and (4) automatically adjusting PLL parameter(s) and the sample number in accordance with a predetermined strategy, such that adjusted PLL parameters are provided to the PLL.

Abstract: A device (800) and method (900) are included for providing a high-rate queueing discipline in an information network system having a plurality of traffic classes. The high-rate queueing discipline is based on a scan table-based dequeueing scheme having a scan table that is precomputed and stored in memory, thus facilitating rapid processing of different traffic class information. The device and method are particularly useful in a fast packet system.

Abstract: A device and method for asynchronous cyclic redundancy checking (CRC) for digital receivers includes utilizing a finite impulse response (FIR) filter, and comparing and gating circuits. The FIR filter may contain a first multiple delay system unit (102) and a first logic gating system (104). The comparing and gating circuit may contain a second multiple delay system unit (106), and a second logic gating system (110). The device and method is implementable, where desired, utilizing a computer program. The invention provides a faster determination of a CRC frame synchronization on a received digital signal.

Abstract: A device (400) and method (1200) include interleaved trellis precoding to provide a low probability of error in the presence of bursty noise. The use of interleaving and shaping, particularly in a trellis precoded system, provide for improved burst error bit correction.

Abstract: Arbitration is performed among a plurality of users for access to a shared resource in a system of the kind in which the users arbitrate by placing arbitration signals on a line and subsequently comparing their arbitration signals with a signal appearing on the line, by providing the users with independently operating clocks, and controlling the progression of the arbitration based on timing provided by the clock of at least one of the users. The progression of the arbitration thus does not depend upon a single master clock, or upon synchronizing the individual user clocks.

Abstract: A priority assignment method and device are set forth for assigning a priority to a selected speech frame coded by a linear predictive coder based on at least two of: an energy of the speech frame, a log spectral distance between a frame and a frame immediately previous, and a pitch predictor coefficient for the selected speech frame. The invention protects against loss of perceptually important and hard-to-reconstruct speech frames.

Abstract: The device and method provide precoding and symbol-rate transmitter spectral shaping of signals representative of digital information. The invention improves reliability of reception in the presence of non-Gaussian channel noise. The present invention also provides a flexible way of choosing between linear equalization, precoding without spectral shaping, and precoding with spectral shaping.

Abstract: A method of and apparatus for allocating memory for storage of vocabularies used in adaptive data compression of a frame-multiplexed data stream of a data communications network. More specifically, a memory of a data compression encoder of the network is partitioned into a plurality of sections for the temporary storage of a corresponding plurality of data compression vocabularies. A memory section of the plurality is assigned to a current frame of the frame-multiplexed data stream based on information of the current frame for storage of a vocabulary created adaptively from the current frame.

Abstract: A queueing and dequeueing mechanism for use in an integrated fast packet network, wherein fast packets from differing traffic types are multiplexed with one another through use of a weighted round-robin bandwidth allocation mechanism (517). Fast packets within a particular traffic type are selected for transmission through use of a head of line priority service (514), a packet discard mechanism (516), or both. The weighted round-robin bandwidth allocation mechanism functions, in part, based upon a credit counter for each queue group that represents a particular traffic type.

Abstract: A digital data sequence is mapped into a signal point sequence e(D) for data transmission over a channel h(D) to produce a channel output sequence y(D)=e(D)h(D). e(D) is chosen so that the signal points in the sequence y(D) belong to a class of possible sequences based on the digital data sequence, the class being based on a time-varying trellis code derived from an N-dimensional time-invariant trellis code by using different transformed versions of its underlying lattices for respectively different N-dimensional symbols.

Abstract: A two wire modem selects a carrier frequency in a baud rate from a predetermined plurality of carrier frequencies and baud rates to communicate with another modem over a communication media in a full duplex mode based on signal and echo characteristics of the communication media estimated by the modem. In addition, the processes of estimating channel characteristics and estimating range are combined in a common start up procedure comprising a plurality of successive time segments for a call modem to communicate with an answer modem over a communication media. Still further, a method is provided for switching from a primary communication media connection to a secondary connection of a data communications network for communication by first and second modems coupled to the network. More specifically, when a failure is detected in the primary connection, the secondary connection is qualified before switching thereto.

Abstract: A power on reset circuit uses a first inverter with hysteresis operating in response to a first power supply potential to develop a first reset signal when the first power supply potential is greater than a first predetermined threshold. A second inverter with hysteresis also operates in response to the first power supply potential for developing a second reset signal when the first power supply potential is greater than a second predetermined threshold. The first reset signal disables the second inverter until the first power supply potential reaches the first predetermined threshold. A delay circuit delays the second reset signal to ensure the first power supply potential is fully operational before indicating a ready condition.

Abstract: Apparatus for interfacing a network manager to a network of communication devices over a single communications channel of a plurality of signals is disclosed. Each communication device of the network is uniquely assigned a poll address for communication selection by the network manager which is operative to establish communication with a communication device of the network by transmitting the poll address thereof over the single communication channel. The network of communication devices are coupleable together in a daisy chain through input and output port circuits thereof to form the single communications channel. The input port circuit of each communications device receives and transmits signals from and to the single communications channel upstream of its position in the daisy chain and the output port circuit of each receives and transmits signals from and to the single communications channel downstream of its position in the daisy chain.

Abstract: A first and second digital rate converter device and method provides for synchronization between a first digital sample sequence and a second digital output sequence related to the first digital sample sequence for a rate converter pair (501, 511; 601, 611). The method typically utilizes at least one of: queue monitoring and zero-crossing with resetting to minimize sampling timing error.

Abstract: A novel spectral interpolation and efficient excitation codebook search method developed for a Code-Excited Linear Predictive (CELP) speech coder is set forth. The interpolation is performed on an impulse response of the spectral synthesis filter. As the result of using this new set of interpolation parameters, the computations associated with an excitation codebook search in a CELP coder are considerably reduced. Furthermore, a coder utilizing this new interpolation approach provides noticeable improvement in speech quality coded at low bit-rates.

Abstract: Apparatus for enabling a first processor to cause a second processor to effect a transfer of data between the processors in accordance with data transfer commands sent from the first processor to the second processor is described. The processors each have a program instruction memory for enabling the processors to operate independently and simultaneously when no data transfer is occurring between them, and the apparatus includes data transfer circuitry connected between the processors for enabling the data to be transferred, a program instruction decoder associated with the second processor for normally decoding and executing instructions stored in the program instruction memory of the second processor when no data transfer is occurring, and routing circuitry for carrying the data transfer commands from the first processor to the program instruction decoder for decoding to provide signals to the data transfer circuitry to effect a transfer of data.