Abstract: A semiconductor substrate is provided that exhibits very low substrate resistance while also providing structural integrity and robustness to resist breakage during manufacturing. The invention also provides methods of making these semiconductor substrates. The semiconductor substrate includes a planar surface and a recess extending below the planar surface. Preferred substrates include a plurality of recesses arranged in an array.

Abstract: Die attach methods are provided. These methods include (a) providing a supply of die attach adhesive, (b) applying a portion of the die attach adhesive to a transfer member, and (c) contacting the lead frame paddle with the transfer member to print a layer of adhesive onto the lead frame paddle. Integrated circuit (IC) devices are also provided.

Abstract: A method and apparatus for adjusting charging and discharging currents of a pin driver to optimize slew rates and overshoot for different types of logic circuits. The current charging and discharging circuits include respective transistors that are mirrored to a transistor whose current varies in accordance with VH-VL where VH and VL are programmed reference voltages defining the high and low voltage levels of the output driver pulses. Thus, when VH-VL is relatively large such as for CMOS outputs, slew rates are relatively high. However, when VH-VL is relatively small such as for ECL outputs, slew rates are reduced to prevent excessive overshoot.

Abstract: A circuit which provides additional drive current during substantially the entire transition of an output signal from a logical one to a logical zero state, thereby causing the pulldown transistor in the TTL output stage to rapidly turn on, providing increased switching speed between logical one and logical zero output state for a given power consumption. Alternatively, for a given switching speed, power consumption is reduced.

Abstract: In accordance with the teachings of this invention, a novel PLA row driver circuit is provided which utilizes a minimum number of components, thereby minimizing integrated circuit surface area, and thus reducing cost, and minimizing stray capacitance, thereby increasing speed of operation. Furthermore, in accordance with the teachings of this invention, a circuit is provided which, while utilizing a minimum number of components, provides a first VOL level to the row line during normal operation of the device, and a second, higher VOL level to the row line during programming.

Abstract: A line driver circuit capable of operating at high speeds. The output transistor, an emitter connected to an output terminal, has a special feedback capacitor connected to its base. The feedback capacitor helps pull the output terminal high to increase the switching speed of the line driver circuit. Special current injection and removal techniques are used to speed the switching times of the PNP current supply transistors. The line driver circuit also has special circuitry to limit the output current from exceeding certain limits and for keeping the line driver circuit from overheating.