Abstract: A system or a network may include an optoelectronic module that includes an optical transmitter optically coupled with an optical fiber, and a controller communicatively coupled to the optical transmitter. The controller may be configured to operate the optical transmitter to transmit data signals through the optical fiber. The optoelectronic module may be configured to transmit time synchronization signals through the optical fiber along with the data signals.

Abstract: A method for configuring hardware-configured optical links includes generating a first optical signal comprising a slow scan of wavelength channels where the slow scan has a dwell time on a particular wavelength channel. A second optical signal is generated comprising a fast scan of wavelength channels, where the fast scan has a dwell time on a particular wavelength channel and a complete channel scan time where the slow scan dwell time is greater than or equal to complete channel scan time. The first optical signal is transmitted over a link and a portion is then detected. A pulse of light having a duration that is less than the dwell time on the particular wavelength channel of the fast scan is then detected. Client data traffic is then sent over the link in response to the detected pulse of light and the detected portion of the first optical signal.

Abstract: A holographic display image projector system including an input light source for generating an at least partially coherent optical input beam and an imaging system for transforming an image representation in the Fourier domain into a corresponding holographic image in the spatial domain. The image projector includes a spatial light modulator having a reflective phase manipulating surface and being responsive to an electric control signal to generate a two-dimensional phase profile on the reflective phase manipulation surface to diffract the optical input beam into a diffracted beam having a plurality of diffraction components angularly separated in a first dimension. A coupling prism having a first surface positioned such that a first subset of the diffraction components is refracted through the first surface to the imaging system, wherein upon refraction, an angular separation of the first subset of diffraction components is increased by at least a factor of 2.

Abstract: An electro-optical modulator includes a substrate comprising a first Mach-Zehnder modulator comprising a first waveguide and a second waveguide and a second Mach-Zehnder modulator comprising a first waveguide and a second waveguide. A first positive signal electrode is positioned on the substrate over the first waveguide of the first Mach-Zehnder modulator and a first negative signal electrode is positioned on the substrate over the second waveguide of the first Mach-Zehnder modulator. The first positive signal electrode and the first negative signal electrode are connected to a first differential signal input. A second positive signal electrode is positioned on the substrate over the first waveguide of the second Mach-Zehnder modulator and a second negative signal electrode positioned on the substrate over the second waveguide of the second Mach-Zehnder modulator. The second positive signal electrode and the second negative signal electrode are connected to a second differential signal input.

Abstract: A communication module includes a printed circuit board, a housing including a left and right sidewall, a top and bottom panel, and a catch pin extending from the bottom panel, the housing enclosing the circuit board and configured to be inserted into and removed from the host device, and a delatch assembly slidably engaged with the bottom panel of the housing, including first and second delatch arms extending underneath the bottom panel of the housing and configured to removably engage with the host device, and a delatch cross-member extending underneath the bottom panel of the housing, including a hooking member configured to selectively engage the catch pin as the delatch assembly slides along the housing.

Abstract: A driver circuit includes a differential driver and a duty cycle correction circuit. The differential driver includes differential inputs to receive a differential input signal and a first common mode input to receive a first input common mode voltage and a first differential output to output a first differential output voltage with a first output common mode voltage. The duty cycle correction circuit includes a first tunable voltage reference and a first comparison circuitry configured to generate the first input common mode voltage based on reducing a difference determined by the first comparison circuitry between a first reference voltage generated by the first tunable voltage reference and the first output common mode voltage at the first differential output of the first differential driver.

Abstract: In an example, a method may include dispensing a portion of epoxy on a first surface. The method may also include curing the portion of epoxy to form precured epoxy. The method may also include positioning the first surface and a second surface separated from each other by a gap. The precured epoxy is located within the gap between the first surface and the second surface. The method may also include dispensing bulk epoxy into the gap and in contact with the precured epoxy, the first surface, and the second surface. The method may also include curing the bulk epoxy to bond the first surface to the second surface.

Abstract: An example embodiment includes optical receiver that includes a polarization beam splitter (PBS), a polarization controller, and a forward error correction (FEC). The PBS is configured to split a received optical signal having an unknown polarization state into two orthogonal polarizations (x?-polarization and y?-polarization). The polarization controller includes no more than two couplers and no more than two phase shifters per wavelength channel of the x?-polarization and the y?-polarization. The polarization controller is configured to demultiplex the x?-polarization and the y?-polarization into a first demultiplexed signal having an first polarization on which a data signal is modulated and a second demultiplexed signal having a second, orthogonal polarization on which a pilot carrier oscillator signal is encoded. The FEC decoder module is configured to correct a burst of errors resulting from resetting one of the phase shifters based on error correction code (ECC) data encoded in the data signal.

Abstract: The present invention relates to an apparatus for damping arid monitoring emissions from a light emitting device, particularly a vertical cavity surface emitting laser (VCSEL), comprising: a semi transparent substrate, preferably glass; a light emitting device for generating light emission; a damping layer deposited on a surface of the substrate; and a pair of electrodes, each of which being in direct contact with the damping layer. The damping layer is adapted to decrease the power level of the light emission of the light emitting device by absorption, to a desired level, for instance, to a level that meets eye safety limits. In addition, the damping layer is photosensitive to the light emission of the light emitting device, thereby allowing the pair of electrodes to output an electric signal corresponding to the power level of the light emission of the light emitting device.

Abstract: In an example embodiment, an N-channel WDM OSA includes active optical devices coupled to a carrier, an optical block, and a MUX or a DEMUX. The optical block may be positioned above the active optical devices and coupled to the carrier. The optical block may include a bottom with lenses formed in the bottom that are aligned with the active optical devices; a first side that extends up from the bottom; a second side that extends up from the bottom and is opposite the first side; a port that extends forward from the bottom and the first and second sides; and an optical block cavity defined by the bottom and the first and second sides that extends rearward from the port. The MUX or DEMUX may be positioned in the optical block cavity in an optical path between the port of the optical block and the active optical devices.

Abstract: An optical system includes a silicon (Si) substrate, a buried oxide (BOX) layer formed on the substrate, a silicon nitride (SiN) layer formed above the BOX layer, and a SiN waveguide formed in the SiN layer. In some embodiments, the optical system may additionally include an interposer waveguide adiabatically coupled to the SiN waveguide to form a SiN-interposer adiabatic coupler that includes at least the tapered section of the SiN waveguide, the optical system further including at least one of: a cavity formed in the Si substrate at least beneath the SiN-interposer adiabatic coupler or an oxide overlay formed between a top of a SiN core of the SiN waveguide and a bottom of the interposer waveguide. Alternatively or additionally, the optical system may additionally include a multimode Si—SiN adiabatic coupler that includes a SiN taper of a SiN waveguide and a Si taper of a Si waveguide.

Abstract: An apparatus and method for signaling and transmitting data through an optical link is described. The apparatus may include a connector including a first plurality of contacts compatible with an enhanced SFP (SFP+) connector. The connector further includes an additional contact formed at a space adjacent to the first plurality of contacts. A tone generator couples to the additional contact to receive a first signal and to generate a first distinct tone indicative of the first signal for transmission via the additional contact. The method may include generating a first distinct tone indicative of a first signal providing control or status of an apparatus and transmitting or receiving a differential data signal over a portion of a first plurality of contacts compatible with an enhanced SFP (SFP+) connector. The first distinct tone is transmitted over the additional contact formed in a space adjacent to the first plurality of contacts.

Abstract: A serializer circuit may include a recovery circuit, an adjusting circuit, and a multiplexer circuit. The recovery circuit may be configured to receive a first data signal at a first frequency, to generate a first clock signal at the first frequency using the first data signal, and to retime the first data signal based on the first clock signal to generate a retimed first data signal. The adjusting circuit may be configured to receive a second data signal and retime the second data signal based on the first clock signal to generate a retimed second data signal. The multiplexer circuit may be configured to multiplex the retimed first data signal and the retimed second data signal.

Abstract: A differential signal offset adjustment circuit may include a first circuit for receiving a first one of a differential input signal and generating a first one of a differential output signal with positive offset based on a differential offset signal. The circuit may further include a second circuit for receiving a second one of a differential input signal and generating a second one of a differential output signal with a negative offset based on the differential offset signal.

Abstract: A multi-channel receiver that includes a first clock recovery unit configured to recover a first clock signal associated with a first optical channel is disclosed. A first coefficient estimation unit estimates a first set of coefficients using the first clock signal. A second clock recovery unit configured to recover a second clock signal associated with a second optical channel using the first clock signal as a reference clock signal. A second coefficient estimation unit estimates a second set of coefficients using the first set of coefficients.

Abstract: An optoelectronic system includes an optoelectronic module and a heat sink. The optoelectronic module includes a housing and first and second housing slide locks. The first and second housing slide locks extend outward from opposite sides of the housing. The heat sink includes a heat sink bottom, first and second heat sink legs, and first and second heat sink slide locks. The first and second heat sink legs extend downward from opposite ends of the heat sink bottom. The first and second heat sink slide locks extend inward from the first and second heat sink legs. The heat sink bottom is configured to be in thermal contact with a housing top of the housing. Each of the first and second heat sink slide locks is configured to be respectively disposed beneath the first and second housing slide locks when the heat sink is removably secured to the housing.

Abstract: Some embodiments relate to micro vias in printed circuit boards (PCBs). In an example, a PCB may include a PCB substrate and a micro via. The micro via may extend between opposing surfaces of the PCB substrate and may have a diameter less than or equal to about 100 microns. In another example, a method of forming micro vias in a PCB may include forming a through hole in a PCB substrate of the PCB. The method may also include positioning a pillar that is electrically conductive within the through hole. The method may also include backfilling the through hole around the pillar with an epoxy backfill.

Abstract: A transceiver connector may include a bottomside connector. The bottomside connector may include a first ground pin adjacent to an edge of the bottomside connector, a first high-speed differential input pin adjacent to the first ground pin, a second high-speed differential input pin adjacent to the first high-speed differential input pin, a second ground pin adjacent to the second high-speed differential input pin, a serial interface data line pin adjacent to the second ground pin, a serial interface clock pin adjacent to the serial interface data line pin, a third ground pin adjacent to the serial interface clock pin, a first high-speed differential output pin adjacent to the third ground pin, a second high-speed differential output pin adjacent to the first high-speed differential output pin, and a fourth ground pin adjacent to the second high-speed differential output pin.

Abstract: A loss of signal (LOS) detector may include a comparator including a first input, a second input and an output indicating a LOS status. The LOS detector further includes circuitry to compare a first signal on the first input generated by differential input signals and a threshold signal common mode with a second signal on the second input generated by differential threshold signals at a first level and an input signal common mode. The circuit further configured to generate a LOS indicator on the output based on the compare.

Abstract: An apparatus having first and second transceiver cells formed in a single integrated circuit. In one example embodiment, an apparatus includes a first transceiver cell including a first set of components configured to enable communication on a first communication link in a network and a second transceiver cell formed underneath the first transceiver cell in a single integrated circuit (IC). The second transceiver cell is optically isolated from the first transceiver cell. The second transceiver cell includes a second set of components configured to enable communication on a second communication link in the network.