Abstract: An apparatus for transferring data on a network. The apparatus includes a switch comprising a primary component for switching the data through the switch. The apparatus includes a secondary component for switching the data through the switch if the primary component fails. The apparatus includes a mechanism for counting the data that has been received, transmitted or dropped by the switch without including any redundancy in the counting of the data due to the primary component and secondary component both able to switch data through the switch. A method for transferring ATM cells on a network. The method includes the steps of switching the ATM cells with an ATM switch of the ATM network having a primary component for switching the cells and a secondary component for switching the cells if the primary component fails.

Abstract: An apparatus for storing a packet. The apparatus comprises a buffer in which packets are stored. The apparatus comprises a mechanism for determining an average buffer fill of the buffer, where the average buffer fill is an average fill state of the buffer. The determining mechanism is connected to the buffer. The apparatus comprises a mechanism for calculating a drop probability associated with the packet which identify is the probability the packet will be dropped from a the buffer. The apparatus comprises a mechanism for generating a random number. The apparatus comprises a mechanism for discarding the packet from the elements if the drop probability is greater in than the random number. A method for access control. The method comprises the steps of receiving a packet at an element having a buffer.

Abstract: A timing distribution apparatus. The apparatus includes a source for producing a signal. The apparatus includes a first filter for removing jitter from the signal. The apparatus includes a second filter for removing wander from the signal separate and apart from the first filter. A method for producing a timing distribution signal. The method includes the steps of removing jitter from a signal with a first filter. Then there is the step of removing wander from the signal with a second filter separate and apart from the first filter.

Abstract: An ATM communications system. The system includes an ATM network on which ABR traffic having ABR connections travel and UBR traffic having UBR connections travel. The system includes a first source node which produces UBR traffic connected to the ATM network. The system includes a first UBR-ABR gateway which is connected to the ATM network and which receives the UBR traffic and converts the UBR traffic to ABR traffic. The system includes a second UBR-ABR gateway which is connected to the ATM network and which receives ABR traffic and converts the ABR traffic to UBR traffic. The system includes a destination node connected to the ATM network which receives the UBR traffic. A UBR-ABR gateway regarding ABR traffic having ABR connections and UBR traffic having UBR connections. The gateway includes at least one input port for receiving UBR traffic. The gateway includes a controller which converts the UBR traffic to ABR traffic.

Abstract: A system for storing data. The system includes a host for processing the data. The system includes a buffer mechanism for storing data and producing interrupt signals to the host for informing the host there is data in the buffer mechanism for the host to process. The buffer mechanism adapting the production of interrupts based on the speed the host can process data. The host is in contact with the buffer mechanism. A method for serving data. The method includes the steps of storing data in a buffer mechanism. Then there is the step of sending an initial interrupt signal to a host from the buffer mechanism informing the host there is data in the buffer mechanism for the host to process. Next there is the step of transferring data in the buffer mechanism to the host. Then there is the step of processing data from the buffer mechanism with the host. Next there is the step of adapting when a subsequent interrupt signal is sent to the host based on the speed the host can process data.

Abstract: A scheduler for a server for serving ATM cells. The scheduler includes R rate bins where R is greater than or equal to 2. The scheduler includes a controller which places a session having a desired rate into a rate bin of the R rate bins. A system for transmitting ATM cells. The system includes an ATM network along which ATM cells are transmitted. The system includes S sources where S is greater than or equal to 1 and is an integer. Each source is connected to the network and produces ATM cells for transmission on the network. The system includes D destinations where D is greater than or equal to 1 and is an integer. Each destination is connected to the network. Each destination receives ATM cells from the network. The system includes a server connected to the ATM network. Additionally, the system includes a scheduler which has R different rate bins for holding sessions, where R is an integer greater than or equal to 2.

Abstract: An apparatus for reflecting an f-RM cell as a b-RM cell. The apparatus includes an RM cell processor which is adapted to receive the f-RM cell from an ATM network and modifies ABR information of the f-RM cell to reflect congestion regarding cells on the ATM network. The apparatus includes a transmit scheduler connected to the RM cell processor which forms the b-RM cell from the modified ABR information of the f-RM cell and sends the b-RM cell to the ATM network. The transmit scheduler is decoupled from the RM cell processor. An ATM telecommunications system. A method for reflecting an f-RM cell as a b-RM cell.

Abstract: An ATM communications system. The system includes an ATM network on which ATM cells of ATM packets travel. The system includes a host which produces ATM packets having cells which include at least a payload. The system includes an interface connected to the host which sends ATM cells from the host onto the ATM network. The interface produces read requests to the host for obtaining cells from the host. The interface transfers a partial packet having a plurality of cells from the host to the interface with each read request. The interface has a bus which connects to the host on which communication between the host and the interface occurs. The interface has a transfer mechanism which is connected to the ATM network to send cells to the ATM network. An interface for connection to a host which sends ATM cells from the host to an ATM network. A method for sending ATM cells over an ATM network.

Abstract: A scheduler for controlling when entities are operated upon by the server. The scheduler includes N entities, where N is an integer greater than or equal to 2. Each entity has a rate at which it is to receive service from the server. The scheduler includes a memory having finishing times f.sub.i of the N entities, where f.sub.i corresponds to the time the i'th entity is to be operated upon by the server. The scheduler includes a virtual clock that keeps track of virtual time so the finishing times f.sub.i can be identified. The scheduler includes a controller which chooses entities to be operated upon by the server as a function of the finishing times. The controller slows virtual time to provide service to the entities. The controller is connected to the virtual clock and the memory. A scheduler for controlling when entities are operated upon the server. The scheduler includes N entities, where N is an integer greater than or equal to 2.

Abstract: The present invention relates to an Asynchronous Transfer Mode (ATM) network, and in particular to a system and a method for a number of ATM devices to share the facilities provided by a single ATM switch port. An ATM switch has a number of switch ports which may receive and transmit the data comprising information and a routing identifier. A number of ATM devices are connected in series to each other in a device chain, and at the ends to the chain to a first ATM port. The devices are adapted to distinguish between the information and the routing identifier and may receive and transmit information through the chain, with a first or head device receiving data from the ATM port and the last device transmitting data to the ATM port. A control computer is connected to a second ATM port and may be programmed with the identities of the ATM devices and communicate through the first switch port with a device in the device chain.

Abstract: The present invention pertains to an apparatus for manipulating ATM cells. The apparatus comprises a memory array in which an entire ATM cell can be read or written in one read or write cycle. The apparatus is also comprised of a mechanism for reading or writing the entire ATM cell from or into the memory array. The present invention pertains to a method for switching an ATM cell. The method comprises the steps of receiving the ATM cell at a first input port of a switch from the ATM network. Then there can be the step of storing the ATM cell in one clock cycle in a memory array of the switch. Next there is the step of reading the ATM cell in the memory array in one clock cycle. Next there is the step of transferring the ATM cell from the memory array to a first output port of the switch. Next there is the step of transmitting the ATM cell from the first output port to the ATM network. The present invention pertains to a switch for an ATM cell.

Abstract: A system for connecting source nodes and destination nodes. The system includes an ATM network along which ATM cells travel. The system includes source nodes connected to the ATM network which produce ATM cells that travel along the ATM network. The system includes destination nodes connected to the ATM network which receive ATM cells from the ATM network. The system also includes a switching mechanism connected to the ATM network for directing an ATM cell from a first source node of the source nodes to a first destination node of the destination nodes. The switch mechanism has a mechanism for holding predetermined connection profiles between source nodes and destination nodes. The switch mechanism connects the first source node to the first destination node based on a desired connection profile from the holding mechanism after the first source node makes a request on the switch mechanism to be connected with the first destination node. A method for connecting source nodes and destination nodes.

Abstract: The present invention pertains to an ATM cell interface for dispatching ATM cells, each ATM cell having a header with a VPI field having a value and a VCI field having a value. The interface comprises L input ports to which ATM cells enter the interface, where L is greater than or equal to 1 and is an integer. The interface also comprises Q output ports through which ATM cells exit the interface, where Q is greater than or equal to 1 and is an integer. The interface comprises a memory mechanism 24 having serial access memory management. Additionally, the interface comprises a mechanism for directing the ATM cells from an input port of the L input ports to any desired destination through at least one output port 22 of the Q output ports 22. The directing mechanism 26 has entities which identify desired destinations for a corresponding ATM cell.

Abstract: An ATM communications system. The system includes an ATM network on which ATM cells of ATM packets travel. The system includes a host having a host memory mechanism preferably having cache lines which stores the cells. The system includes an interface having a receive memory mechanism which stores a partial packet comprising a plurality of cells received from the ATM network. The receive memory mechanism aligns with the host memory mechanism so every transfer from the receive memory mechanism of the plurality of cells to the host memory mechanism fills the host memory mechanism along cache lines of the host memory mechanism. The interface has a bus which connects to the host on which communication between the host and the interface occurs. The interface is connected to the ATM network. A method for sending ATM cells over an ATM network. An interface for a host to receive ATM cells from an ATM communication network.

Abstract: The present invention pertains to a method for providing service to entities. The method comprises the steps of receiving a first request for service by a server within a predetermined time from a first entity. Next there is the step of receiving a second request for service by the server within the predetermined time from a second entity. Then there is the step of reducing the service to be provided by the server to the first entity so the second entity can be provided service by the server within the predetermined time. The present invention pertains to a system for providing service. The system comprises N entities, where N is greater than or equal to 2. Each of the N entities require service. The system comprises a server which provides service to the N entities. Also, the system comprises a scheduler connected to the entities and the server.

Abstract: A queue control system is disclosed for use in connection with the transfer of information, in the form of information transfer units, in a digital network. The network provides a plurality of service rate classes, based on, for example transmission rates for the various paths. The information buffer control subsystem includes a information transfer unit receiver, a information transfer unit buffer and a group controller. The information transfer unit receiver receives the information transfer units, and the buffer is provided to buffer the received information transfer units prior to transmission. The group controller controls the buffering of information transfer units received by the information transfer unit receiver in the buffer.

Abstract: The present invention pertains to an apparatus for providing service to entities. The apparatus comprises a server for providing the service. The apparatus also comprises a plurality of entities which require the service of the server. The entities are connected with the server. Additionally, the apparatus comprises a scheduler for scheduling when each of the entities receives the service of the server. The scheduler is connected with the server and the entities. There is a time stamp mechanism for providing a longer-format time stamp to a requesting entity of the plurality of entities whenever the requesting entity requests service from the server. The time stamp mechanism is connected to the scheduler and the server. Moreover, the apparatus comprises means for compressing the longer-format time stamp into a corresponding shorter-format window-based time stamp and storing the shorter-format window based time stamp.

Abstract: The method includes the steps of receiving new information about the node. Then, there is the step of comparing the new information about the node with old information about the node. Then, there is the step of updating the old information with the new information by incrementing the old information with the new information. A method for monitoring an other node. The method includes the steps of storing an old packet from an other node having at least a first element in a memory of a node. Then, there is the step of receiving a new packet from the other node having at least a first element by the node. Next there is the step of comparing the first element of the new packet with the first element of the old packet. Then there is the step of inserting the first element of the new packet in an order which is in front of the first element of the old packet in the memory if the first element of the new packet is different than the first element of the old packet.

Abstract: The present invention pertains to an ATM cell interface for dispatching ATM cells, each ATM cell having a header with a VPI field having a value and a VCI field having a value. The interface comprises L input ports to which ATM cells enter the interface, where L is greater than or equal to 1 and is an integer. The interface also comprises Q output ports through which ATM cells exit the interface, where Q is greater than or equal to 1 and is an integer. The interface comprises a memory mechanism 24 having serial access memory management. Additionally, the interface comprises a mechanism for directing the ATM cells from an input port of the L input ports to any desired destination through at least one output port 22 of the Q output ports 22. The directing mechanism 26 has entities which identify desired destinations for a corresponding ATM cell.

Abstract: A computer network includes a plurality of routing nodes, each routing node being connected to selected ones of the other routing nodes and at least some of the routing nodes being connected to one of a plurality of packet sources or one of a plurality of packet destinations. Each routing node routes packets that are generated by the packet sources to respective ones of the packet destinations, each packet including a plurality of serially-transmitted cells. At least some of the routing nodes, in response to detection of a selected degree of congestion, enable an "early packet discard control arrangement," in which they discards cells which they receive which are related to packets for which they did not receive a cell prior to enabling the early packet discard control arrangement.