Patents Assigned to Genesys Logic, Inc.
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Patent number: 8700839Abstract: A method for performing a static wear leveling on a flash memory is disclosed. Accordingly, a static wear leveling unit is disposed with a block reclamation unit of either a flash translation layer or a native file system in the flash memory, and utilizes less memory space to trace a distribution status of block leveling cycles of each physical block of the flash memory. Based on the distribution record of the block leveling cycles, the number of the leveling cycles less than a premeditated threshold would be found while the system idles. Then the static wear leveling unit requests the block reclamation unit to level the found blocks. Before leveling the found block, the rarely updated data is compelled to move from one block to another block which is leveled frequently, whereby accurate wear leveling cycles for the blocks can be averaged extremely.Type: GrantFiled: December 21, 2007Date of Patent: April 15, 2014Assignee: Genesys Logic, Inc.Inventors: Yuan-Hao Chang, Jen-Wei Hsieh, Tei-Wei Kuo, Cheng-Chih Yang
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Publication number: 20140098260Abstract: A method for processing image data is described. The method includes the steps: (a) fully writing image data into first buffer area; (b) vertically reading the image data in first buffer area and horizontally writing image data into second buffer area; (c) while completely reading a first portion of first buffer area, allocating the complete read first portion of first buffer area to second buffer area to be served as a writing section; (d) vertically reading the image data in a second portion of first buffer area and writing the image data into second buffer area; and (e) vertically reading the image data of second buffer area and horizontally writing the image data into first buffer area, and after completely reading a portion of second buffer area, allocating the read portion of second buffer area to first buffer area.Type: ApplicationFiled: October 3, 2013Publication date: April 10, 2014Applicant: GENESYS LOGIC, INC.Inventor: Wen-fu TSAI
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Publication number: 20140036972Abstract: A transceiver system having a phase and frequency locked architecture is described. The transceiver system includes a clock and data recovery type receiver, a frequency divider and a transmitter. The clock and data recovery type receiver receives an external signal from a host unit and extracts the external signal to generate a clock signal and a data signal. The frequency divider is used to divide the frequency of the clock signal for generating a reference clock signal. The transmitter transmits output data content based on the reference clock signal.Type: ApplicationFiled: October 16, 2013Publication date: February 6, 2014Applicant: Genesys Logic, Inc.Inventor: Ying-Chen LIN
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Patent number: 8605772Abstract: A transceiver system having a phase and frequency locked architecture is described. The transceiver system includes a clock and data recovery type receiver, a frequency divider and a transmitter. The clock and data recovery type receiver receives an external signal from a host unit and extracts the external signal to generate a clock signal and a data signal. The frequency divider is used to divide the frequency of the clock signal for generating a reference clock signal. The transmitter transmits output data content based on the reference clock signal.Type: GrantFiled: September 8, 2010Date of Patent: December 10, 2013Assignee: Genesys Logic, Inc.Inventor: Ying-Chen Lin
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Patent number: 8582926Abstract: A hand-held scanning system and method thereof are described. A look-up table is created to generate a mapping relation between a plurality of reference amplitudes and a plurality of corresponding sampled positions. An analog-to-digital converter samples an analog signal and converts it into a digital signal. The digital signal represents a mapping relation between the sampled positions of the movement distance and the corresponding scanning amplitudes of the signal intensity. The hand-held scanning system ascertains the sampled positions corresponding to a former scanning amplitudes and a present scanning amplitudes according to the look-up table during the scanning stage for detecting the position variation status to determine whether the trigger signal is activated for image scanning or not.Type: GrantFiled: May 4, 2011Date of Patent: November 12, 2013Assignee: Genesys Logic, Inc.Inventor: Mi-lai Tsai
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Patent number: 8553753Abstract: A clock-synchronized method for universal serial bus (USB) is described. The method includes the following steps of: (a) a transmitter sends a periodic signal to a host unit during a first time interval; (b) the host unit transmits a first equalization training sequence signal to a receiver during a second time interval to train the receiver and the transmitter continuously sends the periodic signal to the host unit; (c) a clock and data recovery device extracts the first equalization training sequence signal during the second time interval to generate a extracted clock signal and a data signal; and (d) the transmitter sends a second equalization training sequence signal to the host unit based on the extracted clock signal during the third time interval to train the host unit and the receiver and the transmitter commonly utilize the extracted clock signal as a reference clock.Type: GrantFiled: August 10, 2010Date of Patent: October 8, 2013Assignee: Genesys Logic, Inc.Inventors: Jiun-cheng Hsieh, Ying-chen Lin
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Patent number: 8526077Abstract: A scanning system having a brightness compensation apparatus and method thereof are described. The brightness compensation apparatus includes a statistics window control unit, a brightness statistics logic unit, and a comparing logic unit. The statistics window control unit sets a statistics window setting area. The brightness statistics logic unit generates the current brightness statistics data corresponding to the current page. The comparing logic unit compares the current brightness statistics data with brightness target value to determine whether the brightness compensation apparatus compensates the brightness of next page based on the comparison result and/or image gain of the current page for adjusting the brightness of the scanning system according to the compared result between the brightness statistic data and the brightness target value.Type: GrantFiled: July 16, 2012Date of Patent: September 3, 2013Assignee: Genesys Logic, Inc.Inventor: Mi-lai Tsai
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Patent number: 8482260Abstract: A power management system is described. The power management system includes an input power selecting unit, a charging control unit and a power switching control unit. The input power selecting unit receives a plurality of input power sources for selecting one of the input power sources to be inputted to the electronic apparatus. The charging control unit includes a charging controller and a battery. The charging controller receives a charge-enabling signal. The battery is charged by a second voltage and selectively supplies a battery power. The power switching control unit outputs a driving voltage to drive the electrical apparatus based on an adaptor-enabling signal and a power-detecting signal when the power switching control unit switches the input power sources and the battery power to select one of the input power sources and the battery power.Type: GrantFiled: August 18, 2009Date of Patent: July 9, 2013Assignee: Genesys Logic, Inc.Inventors: Hsiang-chi Hsieh, Chin-ching Chan
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Publication number: 20130120953Abstract: A junction box for connecting a power supply unit is disclosed. The junction box includes a first connection terminal, a second connection terminal, a first signal connection terminal, a second signal connection terminal, and a switching module. The first and second connection terminals are utilized to transmit a DC power provided by the power supply unit. The first and second signal connection terminals are utilized to transmit a control signal. The switching module controls the electrically coupling relationship between the first connection terminal and the second terminal according to the control signal. A power system which employs the junction boxes and a method for controlling the power system are also disclosed.Type: ApplicationFiled: July 12, 2012Publication date: May 16, 2013Applicant: GENESYS LOGIC, INC.Inventor: Chien-chih Lin
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Patent number: 8427711Abstract: A scanning controller, a scanning apparatus and a method for performing the scanning controller are disclosed herein. The scanning controller includes an image data processing unit, a memory control unit, a dummy line control unit, a buffer condition control unit, a motor condition control unit, a motor controlling unit and a relation control unit. Based on at least one of several predetermined contrastive relationships among each stored data amount with regard to an image buffer and its corresponding motor move timing, the relation control unit controls generation of a motor move timing from the motor controlling unit to drive a motor with variance of a scanned data generation rate and simultaneously enable determination of the dummy line control unit on which part of scanned image data should be skipped by catching of the image data processing unit.Type: GrantFiled: November 10, 2012Date of Patent: April 23, 2013Assignee: Genesys Logic, Inc.Inventor: Mi-Lai Tsai
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Patent number: 8421785Abstract: An electrical device having a display screen to adjust displaying image based on a rotation of a web camera. The web camera is rotatably installed on one side of the frame surrounding the display screen. The web camera captures an image data in a first direction or a second direction. An image sensor generates a plurality of brightness signals based on the image data. A processing unit is used for determining the display to show the image data in a first mode or a second mode based on the plurality of brightness signals.Type: GrantFiled: March 19, 2009Date of Patent: April 16, 2013Assignee: Genesys Logic, Inc.Inventors: Yu-jen Hsu, Nei-chiung Perng
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Patent number: 8407508Abstract: A serial bus clock frequency calibration system and a method thereof are disclosed herein. The system utilizes a first frequency calibration device, a second frequency calibration device and a third frequency calibration device to share the same oscillator as so to perform multi-stage clock frequency resolution calibrations for different frequency-tuning ranges. This can bring an optimal frequency resolution, greatly reduce system complexity and save element cost.Type: GrantFiled: September 16, 2010Date of Patent: March 26, 2013Assignee: Genesys Logic, Inc.Inventors: Wei-te Lee, Shin-te Yang, Wen-ming Huang
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Publication number: 20130070313Abstract: A scanning controller, a scanning apparatus and a method for performing the scanning controller are disclosed herein. The scanning controller includes an image data processing unit, a memory control unit, a dummy line control unit, a buffer condition control unit, a motor condition control unit, a motor controlling unit and a relation control unit. Based on at least one of several predetermined contrastive relationships among each stored data amount with regard to an image buffer and its corresponding motor move timing, the relation control unit controls generation of a motor move timing from the motor controlling unit to drive a motor with variance of a scanned data generation rate and simultaneously enable determination of the dummy line control unit on which part of scanned image data should be skipped by catching of the image data processing unit.Type: ApplicationFiled: November 10, 2012Publication date: March 21, 2013Applicant: GENESYS LOGIC, INC.Inventor: GENESYS LOGIC, INC.
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Patent number: 8392690Abstract: A management method for reducing the utilization rate of random access memory (RAM) while reading data from or writing data to the flash memory is disclosed. A physical memory set is constructed from a plurality of physical memory blocks in the flash memory. A logical set is constructed from a plurality of logical blocks wherein the data stored in the logical set are stored in the physical memory set. Further, the data stored in each of the logical blocks are stored in one number of physical memory blocks. A mapping table is constructed and includes a hash function, a logical set table, a physical memory set table, and a set status table for managing the relationship among the physical memory sets, physical memory blocks, and logical blocks while reading data from or writing data to the flash memory.Type: GrantFiled: December 20, 2007Date of Patent: March 5, 2013Assignee: Genesys Logic, Inc.Inventors: Yuan-sheng Chu, Jen-wei Hsieh, Yuan-hao Chang, Tei-wei Kuo, Cheng-chih Yang
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Patent number: 8392620Abstract: An accelerated access apparatus and reading and writing methods thereof are described. A processing unit is used to determine whether the continuation state of a plurality of first address parameters of first request signals. Each first request signal has a first address length. When the first address parameters are continuous thereamong, the processing unit converts one of the second request signals into a second reading command which has a second reading address and a second reading address length. The second reading address length is greater than one of the first address lengths. The processing unit executes the second reading command to read data content to be stored in a buffer unit based on the second reading address and the second reading address length for responding to the second request signals.Type: GrantFiled: December 21, 2009Date of Patent: March 5, 2013Assignee: Genesys Logic, Inc.Inventor: Jin-min Lin
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Patent number: 8392169Abstract: Generating a virtual CD recorder by using a storage device is proposed. The storage device includes a first data sector for storing auto-run data and a second data sector for storing table of content (TOC) information data. When the storage device is connected to a host, a detecting module of the host detects whether the TOC information data exists in the second sector. When the TOC information data exists or could be accessed, a reading module can read a first disc image file based on the TOC information data. A burning module can record data into a second disc image file and update the TOC information data associated with the second disc image file in the second sector.Type: GrantFiled: May 24, 2010Date of Patent: March 5, 2013Assignee: Genesys Logic, Inc.Inventor: Chi-hung Chiang
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Patent number: 8368967Abstract: A scanning controller, a scanning apparatus and a method for performing the scanning controller are disclosed herein. The scanning controller includes an image data processing unit, a memory control unit, a dummy line control unit, a buffer condition control unit, a motor condition control unit, a motor controlling unit and a relation control unit. Based on at least one of several predetermined contrastive relationships among each stored data amount with regard to an image buffer and its corresponding motor move timing, the relation control unit controls generation of a motor move timing from the motor controlling unit to drive a motor with variance of a scanned data generation rate and simultaneously enable determination of the dummy line control unit on which part of scanned image data should be skipped by catching of the image data processing unit.Type: GrantFiled: September 25, 2009Date of Patent: February 5, 2013Assignee: Genesys Logic, Inc.Inventor: Mi-lai Tsai
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Publication number: 20130013936Abstract: A dynamic power management system for USB hub and method thereof are described. The dynamic power management system includes a host device, a power unit and a hub device. A power management module disposed in the hub device dynamically adjusts the power-supplying statuses of ports in the hub device and further reduces the cost of power transformer externally connected to the hub device.Type: ApplicationFiled: September 24, 2011Publication date: January 10, 2013Applicant: Genesys Logic, Inc.Inventors: Chih-Jung Lin, Wei-te Lee
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Patent number: 8345322Abstract: A scanning apparatus having dual power mode is described. The scanning apparatus includes a detection module, a switch unit, and a power controller. The detection module detects a first voltage signal and a second voltage signal for generating a detecting signal. The switch unit receives the commands from the power controller for outputting the first voltage signal and/or the second voltage signal to the image acquiring device of the scanning apparatus. The power controller determines whether the first voltage signal is detected according to the detecting signal. While the first voltage signal is detected, the power controller controls the switch unit to output the first voltage signal and/or the second voltage signal to the image acquiring device. While the first voltage signal is not exist, the power controller controls the switch unit to output the second voltage signal to the image acquiring device.Type: GrantFiled: August 25, 2009Date of Patent: January 1, 2013Assignee: Genesys Logic, Inc.Inventors: Tsu-hsun Yi, Mi-lai Tsai
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Publication number: 20120284450Abstract: A flash memory system and managing and collecting methods for flash memory with invalid page messages thereof are described. When the valid data pages of the flash memory are changed to invalid data pages, a recording area is used to record the message of the invalid data pages to effectively collect the occupied space of the invalid data pages in the flash memory. Further, while garbage collecting step is performed, a block is rapidly selected according to the message of the recording area and the valid data pages in the selected block are correctly identified, copied and removed.Type: ApplicationFiled: September 24, 2011Publication date: November 8, 2012Applicant: Genesys Logic, Inc.Inventors: PO-CHUN HUANG, Yuan-hao Chang, Jen-Wei Hsieh, Yung-feng Lu, Chia-lin Chang