Patents Assigned to GLO AB
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Patent number: 9287443Abstract: A nanostructured device according to the invention comprises a first group of nanowires protruding from a substrate where each nanowire of the first group of nanowires comprises at least one pn- or p-i-n-junction. A first contact, at least partially encloses and is electrically connected to a first side of the pn- or p-i-n-junction of each nanowire in the first group of nanowires. A second contacting means comprises a second group of nanowires that protrudes from the substrate, and is arranged to provide an electrical connection to a second side of the pn- or p-i-n-junction.Type: GrantFiled: February 6, 2014Date of Patent: March 15, 2016Assignee: GLO ABInventors: Steven Louis Konsek, Yourii Martynov, Jonas Ohlsson, Peter Jesper Hanberg
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Patent number: 9281442Abstract: A light emitting diode (LED) device includes a semiconductor nanowire core, and an In(Al)GaN active region quantum well shell located radially around the semiconductor nanowire core. The active quantum well shell contains indium rich regions having at least 5 atomic percent higher indium content than indium poor regions in the same shell. The active region quantum well shell has a non-uniform surface profile having at least 3 peaks. Each of the at least 3 peaks is separated from an adjacent one of the at least 3 peaks by a valley, and each of the at least 3 peaks extends at least 2 nm in a radial direction away from an adjacent valley.Type: GrantFiled: December 15, 2014Date of Patent: March 8, 2016Assignee: GLO ABInventors: Linda Romano, Sungsoo Yi, Patrik Svensson, Nathan Gardner
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Patent number: 9257616Abstract: Packaged light emitting diodes (LEDs) and methods of packaging a LED include providing a first lead having a first recess in a bottom surface and a second lead having a second recess in a bottom surface, placing a LED die over a top surface of at least one of the first and the second leads, electrically connecting the LED die to the first lead and to the second lead, forming a package around the LED die that includes an opening in its upper surface exposing at least the LED die, and separating the package containing the LED die, the first lead and the second lead from a lead frame such that the package contains a first castellation and a second castellation in a side surface of the package, such that the castellations expose the leads and/or a first platable metal which is electrically connected to the leads.Type: GrantFiled: August 22, 2014Date of Patent: February 9, 2016Assignee: GLO ABInventors: Douglas Harvey, Ronald Kaneshiro
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Patent number: 9231161Abstract: A method for ablating a first area of a light emitting diode (LED) device which includes an array of nanowires on a support with a laser is provided. The laser ablation exposes a conductive layer of the support that is electrically connected to a first conductivity type semiconductor nanowire core in the nanowires, to form a first electrode for the LED device. In embodiments, the nanowires are aligned at least 20 degrees from the plane of the support. A light emitting diode (LED) structure includes a first electrode for contacting a first conductivity type nanowire core, and a second electrode for contacting a second conductivity type shell enclosing the nanowire core, where the first electrode and/or at least a portion of the second electrode are flat.Type: GrantFiled: April 24, 2015Date of Patent: January 5, 2016Assignee: GLO ABInventor: Scott Brad Herner
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Patent number: 9224914Abstract: Various embodiments include methods of fabricating a semiconductor device that include forming a plurality of nanowires on a support, wherein each nanowire comprises a first conductivity type semiconductor core and a second conductivity type semiconductor shell over the core, forming an insulating material layer over at least a portion of the plurality of nanowires such that at least a portion of the insulating material layer provides a substantially planar top surface, removing a portion of the insulating material layer to define an active region of nanowires, and forming an electrical contact over the substantially planar top surface of the insulating material layer.Type: GrantFiled: June 17, 2014Date of Patent: December 29, 2015Assignee: GLO ABInventor: Scott Brad Herner
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Patent number: 9196792Abstract: A semiconductor device includes a plurality of first conductivity type semiconductor nanowire cores located over a support, and an insulating mask layer located over the support. The nanowire cores include semiconductor nanowires epitaxially extending from portions of a semiconductor surface of the support exposed through openings in the insulating mask layer. The device also includes a plurality of second conductivity type semiconductor shells extending over and around the respective nanowire cores, a first electrode layer that contacts the second conductivity type semiconductor shells and extends into spaces between the semiconductor shells, and an insulating layer located between the insulating mask layer and the first electrode in the spaces between the semiconductor shells.Type: GrantFiled: June 6, 2014Date of Patent: November 24, 2015Assignee: GLO ABInventors: Scott Brad Herner, Cynthia Lemay, Carl Patrik Theodor Svensson, Linda Romano
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Patent number: 9196787Abstract: A semiconductor device includes a plurality of first conductivity type semiconductor nanowire cores located over a support and extending from portions of a semiconductor surface of the support exposed through openings in the insulating mask layer, and a plurality of semiconductor shells extending over the respective nanowire cores. Each of the plurality of semiconductor shells includes at least one semiconductor interior shell extending around the respective one of the plurality nanowire cores, and a second conductivity type semiconductor outer shell extending around the at least one semiconductor interior shell. A first electrode layer contacts the second conductivity type semiconductor outer shell of the plurality of semiconductor shells and extends into spaces between the semiconductor shells.Type: GrantFiled: June 6, 2014Date of Patent: November 24, 2015Assignee: GLO ABInventors: Carl Patrik Theodor Svensson, Linda Romano, Scott Brad Herner, Cynthia Lemay
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Patent number: 9178106Abstract: A method for treating a LED structure with a substance, the LED structure includes an array of nanowires on a planar support. The method includes producing the substance at a source and causing it to move to the array along a line. The angle between the line followed by the substance and the plane of the support is less than 90° when measured from the center of the support. The substance is capable of rendering a portion of the nanowires nonconductive or less conductive compared to before being treated by the substance.Type: GrantFiled: October 22, 2013Date of Patent: November 3, 2015Assignee: GLO ABInventors: Scott Brad Herner, Daniel Bryce Thompson, Cynthia Lemay
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Patent number: 9166106Abstract: A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.Type: GrantFiled: October 22, 2013Date of Patent: October 20, 2015Assignee: GLO ABInventors: Carl Patrik Theodor Svensson, Nathan Gardner
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Patent number: 9142745Abstract: Packaged LED devices include a first lead having a first recess in a bottom surface, a second lead having a second recess in a bottom surface, a LED die located over a top surface of at least one of the leads and electrically connected to the leads, and a package located around the LED die, the first lead and the second lead. The package contains an opening in its upper surface exposing at least the LED die. The package also contains a first castellation and a second castellation in a side surface of the package, such that the first castellation exposes at least one of the first lead and a first platable metal which is electrically connected to the first lead, and the second castellation exposes at least one of the second lead and a second platable metal which is electrically connected to the second lead.Type: GrantFiled: September 19, 2013Date of Patent: September 22, 2015Assignee: GLO ABInventors: Douglas Harvey, Ronald Kaneshiro
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Patent number: 9117990Abstract: A light emitting diode (LED) structure includes a plurality of devices arranged side by side on a support layer. Each device includes a first conductivity type semiconductor nanowire core and an enclosing second conductivity type semiconductor shell for forming a pn or pin junction that in operation provides an active region for light generation. A first electrode layer extends over the plurality of devices and is in electrical contact with at least a top portion of the devices to connect to the shell. The first electrode layer is at least partly air-bridged between the devices.Type: GrantFiled: January 28, 2014Date of Patent: August 25, 2015Assignee: GLO ABInventor: Truls Lowgren
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Patent number: 9076945Abstract: A method for ablating a first area of a light emitting diode (LED) device which includes an array of nanowires on a support with a laser is provided. The laser ablation exposes a conductive layer of the support that is electrically connected to a first conductivity type semiconductor nanowire core in the nanowires, to form a first electrode for the LED device. In embodiments, the nanowires are aligned at least 20 degrees from the plane of the support. A light emitting diode (LED) structure includes a first electrode for contacting a first conductivity type nanowire core, and a second electrode for contacting a second conductivity type shell enclosing the nanowire core, where the first electrode and/or at least a portion of the second electrode are flat.Type: GrantFiled: October 22, 2013Date of Patent: July 7, 2015Assignee: GLO ABInventor: Scott Brad Herner
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Patent number: 9059355Abstract: A method of etching including providing a plurality of nanostructures extending away from a support, the support comprising a dielectric layer located between the plurality of nanowires, forming a patterned mask over a first portion of the plurality of nanostructures, such that a second portion of the plurality of nanostructures are exposed and are not located under the patterned mask, etching the second portion of the plurality of nanostructures to remove at least a portion of the patterned mask and the second portion of the plurality of nanostructures, monitoring at least one gaseous byproduct of the etching of the plurality of nanostructures during the etching of the plurality of nanostructures and stopping the etching on detecting that the dielectric layer is substantially removed.Type: GrantFiled: June 17, 2014Date of Patent: June 16, 2015Assignee: GLO ABInventor: Daniel Bryce Thompson
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Patent number: 9054233Abstract: A device includes a support including at least a first area and a second area, and a plurality of first light emitting devices located over the first area of the support, each first light emitting device containing a first growth template including a first nanostructure, and each first light emitting device has a first peak emission wavelength. The device also includes a plurality of second light emitting devices located over the second area of the support, each second light emitting device containing a second growth template including a second nanostructure, and each second light emitting device has a second peak emission wavelength different from the first peak emission wavelength. Each first growth template differs from each second growth template.Type: GrantFiled: June 6, 2014Date of Patent: June 9, 2015Assignee: GLO ABInventors: Jonas Ohlsson, Carl Patrik Theodor Svensson
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Patent number: 9035278Abstract: A semiconductor device, such as an LED, includes a plurality of first conductivity type semiconductor nanowire cores located over a support, a continuous second conductivity type semiconductor layer extending over and around the cores, a plurality of interstitial voids located in the second conductivity type semiconductor layer and extending between the cores, and first electrode layer that contacts the second conductivity type semiconductor layer.Type: GrantFiled: September 25, 2012Date of Patent: May 19, 2015Assignee: GLO ABInventors: Patrik Svensson, Linda Romano, Sungsoo Yi, Olga Kryliouk, Ying-Lan Chang
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Patent number: 8999737Abstract: Methods of packaging a light emitting diode (LED) include providing a first lead having a first recess in a bottom surface and a second lead having a second recess in a bottom surface, placing a LED die over a top surface of at least one of the first and the second leads, electrically connecting the LED die to the first lead and to the second lead, forming a package around the LED die that includes an opening in its upper surface exposing at least the LED die, and separating the package containing the LED die, the first lead and the second lead from a lead frame such that the package contains a first castellation and a second castellation in a side surface of the package, such that the castellations expose the leads and/or a first platable metal which is electrically connected to the leads.Type: GrantFiled: September 19, 2013Date of Patent: April 7, 2015Assignee: Glo ABInventors: Douglas Harvey, Ronald Kaneshiro
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Patent number: 8937295Abstract: An opto-electric structure includes a plurality of nano elements arranged side by side on a support layer, where each nano element includes at least a first conductivity type semiconductor nano sized core, and where the core and a second conductivity type semiconductor form a pn or pin junction. A first electrode layer that extends over the plurality of nano elements and is in electrical contact with at least a portion of the second conductivity type semiconductor, and a mirror provided on a second conductivity type semiconductor side of the structure.Type: GrantFiled: December 6, 2012Date of Patent: January 20, 2015Assignee: GLO ABInventors: Truls Lowgren, Ghulam Hasnain
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Patent number: 8921141Abstract: Aspects of the invention provide methods and devices. In one embodiment, the invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanopyramids are grown utilizing a CVD based selective area growth technique. The nanopyramids are grown directly or as core-shell structures.Type: GrantFiled: September 18, 2013Date of Patent: December 30, 2014Assignee: Glo ABInventors: Olga Kryliouk, Nathan Gardner, Giuliano Portilho Vescovi
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Patent number: 8901534Abstract: A semiconductor device, such as an LED, includes a plurality of first conductivity type semiconductor nanowire cores located over a support, a continuous second conductivity type semiconductor layer extending over and around the cores, a plurality of interstitial voids located in the second conductivity type semiconductor layer and extending between the cores, and first electrode layer that contacts the second conductivity type semiconductor layer and extends into the interstitial voids.Type: GrantFiled: December 5, 2012Date of Patent: December 2, 2014Assignee: GLO ABInventor: Patrik Svensson
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Publication number: 20140246650Abstract: A nanostructured device according to the invention comprises a first group of nanowires protruding from a substrate where each nanowire of the first group of nanowires comprises at least one pn- or p-i-n-junction. A first contact, at least partially encloses and is electrically connected to a first side of the pn- or p-i-n- junction of each nanowire in the first group of nanowires. A second contacting means comprises a second group of nanowires that protrudes from the substrate, and is arranged to provide an electrical connection to a second side of the pn- or p-i-n-junction.Type: ApplicationFiled: February 6, 2014Publication date: September 4, 2014Applicant: GLO ABInventors: Steven Louis Konsek, Yourii Martynov, Jonas Ohlsson, Peter Jesper Hanberg