Abstract: An embodiment of the present invention discloses a voltage amplifier circuit which includes a signal generator, a mixer and an amplifier. The signal generator is arranged to generate an input signal; the mixer is arranged to mix the input signal with an analog signal to generate an intermediate input signal having a first voltage range; and the amplifier is arranged to convert the intermediate input signal into an output signal having a second voltage range in a Rail-to-Rail manner, wherein the second voltage range is larger than the first voltage range.

Abstract: A charge module is configured to pre-charge a control node to a pre-charged voltage, such that in a case a control module outputs a control voltage, a drive module is activated according to a gate voltage summed by the control voltage and the pre-charged voltage. The charge module includes a first switch, a charge switch, and a second switch. The first switch is configured to provide a first voltage to an operation node. The charge switch is configured to be switched on corresponding to the first voltage of the operation node, so as to charge the control node. The second switch is configured to provide a second voltage to the operation node according to the gate voltage.

Abstract: A driving circuit includes a rectifier circuit and a LED driver integrated circuit. The rectifier circuit rectifies an ac power supply into a de power supply. The LED driver integrated circuit includes a regulator circuit, a voltage detector, a buck boost LED driver, and a common ground terminal. The regulator circuit regulates the dc power supply into a regulated voltage. The voltage detector detects whether the regulated voltage meets a voltage requirement and output the regulated voltage when the voltage requirement is met. The buck boost LED driver converts the regulated voltage detected into an output driving voltage according to a remaining voltage at a negative terminal of the LED load to drive the LED load. Voltage potentials at the common ground terminal and at a load ground terminal of the LED load are the same.

Abstract: The soft-start circuit includes a first charging transistor, a first capacitor, a second charging transistor, a second capacitor and a clamping p-type transistor. The first charging transistor is conducted in response to activating pulses to charge the first capacitor through a first output node such that a first output voltage at the first output node gradually increases. The second charging transistor is conducted in response to the first output voltage to charge the second capacitor through a second output node such that a second output voltage at the second output node gradually increases. The clamping p-type transistor includes a source terminal electrically connected to a clamping node, a drain terminal connected to a ground terminal and a gate electrically connected to the second output node, and is conducted when a voltage at the clamping node exceeds a clamping threshold value to pull low the voltage at the clamping node.

Abstract: A one-shot circuit that includes a fixed-voltage generating module, a clock-shifting module and a logic operation module is provided. The fixed-voltage generating module is operated according to a system voltage to generate a fixed voltage smaller than the system voltage and not varied accordingly. The clock-shifting module includes a delay circuit and at least one first inverter. The delay circuit receives and delays a clock signal to generate a first delayed clock signal. The first inverter is electrically connected to the delay circuit to be operated according to the fixed voltage to receive the first delayed clock signal and generate a second delayed clock signal that is delayed for a predetermined time period relative to the clock signal. The logic operation module receives the clock signal and the second delayed clock signal to perform a logic operation to generate a one-shot signal.

Abstract: A test mode activation circuit that includes a clock signal generating module, a resistor-capacitor circuit, a current generating module, an output capacitor and a comparator is provided. The clock signal generating module generates a clock signal to an input node such that the resistor-capacitor circuit electrically connected to the input node receives the clock signal to generate a triggering signal every predetermined time interval. The current generating module generates a charging current to an output node in response to the triggering signal. The output capacitor receives the charging current from the output node such that an output voltage of the output node gradually increases. The comparator receives the output voltage from the output node and a reference voltage, wherein the comparator compares the output voltage and the reference voltage to generate a test mode activation signal when the output voltage is larger than the reference voltage.

Abstract: An error amplifier and a driving circuit are disclosed herein. The error amplifier is configured to charge a compensation capacitor with an error current. The error amplifier includes an input stage, a main output stage, and an auxiliary output stage. The input stage is configured to provide a first differential output signal and a second differential output signal in response to a comparison between a reference voltage and a feedback voltage. The main output stage is configured to charge the compensation capacitor. The auxiliary output stage is configured to be activated to charge the compensation capacitor. a first operation, both the main output stage and the auxiliary output stage charge the compensation capacitor. In a second operation, the main output stage charges the compensation capacitor, and the auxiliary output stage is deactivated and does not charge the compensation capacitor.

Abstract: An output stage with short-circuit protection includes a power transistor, a detecting module, a disable module, and a driving module. The power transistor is electrically connected between a voltage source and an output node. A gate end of the power transistor is configured to receive a driving signal. The detecting module is configured to detect an output voltage on the output node to determine whether a short-circuit condition occurs, and to provide a detecting signal according to the output voltage on the output node in the short-circuit condition. The disable module is configured to provide a disable signal according to the detecting signal in the short-circuit condition, and operatively stop the disable signal in each cycle period of a clock signal. The driving module is configured to determine whether to generate the driving signal according to the disable signal and the clock signal.

Abstract: A lateral diffused N-type metal oxide semiconductor device includes a semiconductor substrate, an epi-layer on the semiconductor substrate, a patterned isolation layer on the epi-layer, a N-type double diffused drain (NDDD) region in a first active region of the patterned isolation layer, a N+ heavily doped drain region disposed in the NDDD region, a P-body diffused region disposed in a second active region of the patterned isolation layer, a neighboring pair of a N+ heavily doped source region and a P+ heavily doped source region disposed in the P-body diffused region, a first gate structure disposed above a channel region of the patterned isolation layer and a second gate structure disposed above the second active region. The second gate structure and the first gate structure are spaced at a predetermined distance.

Abstract: An output stage with short-circuit protection includes a power transistor, a detecting module, a disable module, and a driving module. The power transistor is electrically connected between a voltage source and an output node. A gate end of the power transistor is configured to receive a driving signal. The detecting module is configured to detect an output voltage on the output node to determine whether a short-circuit condition occurs, and to provide a detecting signal according to the output voltage on the output node in the short-circuit condition. The disable module is configured to provide a disable signal according to the detecting signal in the short-circuit condition, and operatively stop the disable signal in each cycle period of a clock signal. The driving module is configured to determine whether to generate the driving signal according to the disable signal and the clock signal.

Abstract: A driving circuit includes a rectifier circuit and a LED driver integrated circuit. The rectifier circuit rectifies an ac power supply into a de power supply. The LED driver integrated circuit includes a regulator circuit, a voltage detector, a buck boost LED driver, and a common ground terminal. The regulator circuit regulates the dc power supply into a regulated voltage. The voltage detector detects whether the regulated voltage meets a voltage requirement and output the regulated voltage when the voltage requirement is met. The buck boost LED driver converts the regulated voltage detected into an output driving voltage according to a remaining voltage at a negative terminal of the LED load to drive the LED load. Voltage potentials at the common ground terminal and at a load ground terminal of the LED load are the same.

Abstract: An inrush current protection circuit for charging a load to a target voltage, in which the inrush current protection circuit includes a first charging circuit and a second charging circuit. The first charging circuit charges a load to a first stage voltage, and there is a voltage difference existing between the target voltage and the first stage voltage. The second charging circuit charges the load form the first stage voltage to the target voltage, in which the first charge circuit charges slower than the second charging circuit.

Abstract: A charge module is configured to pre-charge a control node to a pre-charged voltage, such that in a case a control module outputs a control voltage, a drive module is activated according to a gate voltage summed by the control voltage and the pre-charged voltage.

Abstract: An error amplifier and a driving circuit are disclosed herein. The error amplifier is configured to charge a compensation capacitor with an error current. The error amplifier includes an input stage, a main output stage, and an auxiliary output stage. The input stage is configured to provide a first differential output signal and a second differential output signal in response to a comparison between a reference voltage and a feedback voltage. The main output stage is configured to charge the compensation capacitor. The auxiliary output stage is configured to be activated to charge the compensation capacitor. In a first operation, both the main output stage and the auxiliary output stage charge the compensation capacitor. In a second operation, the main output stage charges the compensation capacitor, and the auxiliary output stage is deactivated and does not charge the compensation capacitor.

Abstract: A light emitting diode driving circuit includes connected driving units, each of which is configured for driving multiple channels of light emitting diodes generating a feedback voltage for the corresponding driving unit. Each of the driving units includes a selection circuit for comparing the feedback voltage with an input voltage to output a smaller one of the feedback voltage and the input voltage to a next one of the driving units, as the input voltage for the next one of the driving units.

Abstract: A voltage converting circuit for converting an input voltage into an output voltage is disclosed. The voltage converting circuit includes a modulation signal generator, a comparator and a logic unit. The modulation signal generator is configured for generating a pulse width modulation (PWM) signal responsive to a feedback signal corresponding to the output voltage and a load coupled thereto. The comparator is configured for comparing the feedback signal with a reference signal to output a comparing signal. The logic unit is configured for performing a logical conjunction of the PWM signal and the comparing signal to generate a control signal for adjusting an input current corresponding to the input voltage to regulate the output voltage. A method for converting an input voltage into an output voltage is also disclosed herein.

Abstract: A current regulating circuit includes a transistor and an operational amplifier. The transistor receives a load current and generates a feedback voltage corresponding to the load current. The operational amplifier receives a reference voltage and the feedback voltage to control the transistor. The operational amplifier further includes an input stage and an output stage. The input stage includes amplifier inputs each for alternately receiving the reference voltage and the feedback voltage so that the input stage generates operating voltages corresponding to the reference voltage and the feedback voltage. The output stage receives the operating voltages alternately to control the transistor. A driver and a method of current regulation are also disclosed herein.

Abstract: An illumination driving circuit for driving a light-emitting load includes a system voltage source, a switch component, an inductor component, an inductor-current sensing module and a control module. The switch component is coupled between the system voltage source and the light-emitting load. The inductor component is connected in series between the system voltage source and the light-emitting load. The inductor-current sensing module includes a sensing resistor component connected in series between the switch component and the inductor component. The control module is configured for controlling the conductive state of the switch component. An inductor-current sensing terminal of the controlling module is coupled to a node between the sensing resistor component and the switch component. The control module calculates an inductor-current through the inductor component according to a voltage level on the inductor-current sensing terminal.

Abstract: A channel detection device includes a disable circuit, LED pins, receivers and an error detection circuit. The disable circuit sends a disabling pulse to one or some LED pins of the plurality of LED pins, where the one or some LED pins are connected to the disable circuit. Each of the receivers is connected to one of the plurality of LED pins respectively and is capable of outputting an inhibiting signal when the LED pin connected receives the disabling pulse from the disable circuit. The error detection circuit is coupled to the receivers and the LED pins. The error detection circuit is configured to detect open-circuit of some LED pins of the plurality of LED pins, and bypass the detection of open-circuit of some other LED pin of which the receiver outputs the inhibiting signal.

Abstract: An error amplifier and a LED circuit comprising the same are provided. The LED circuit comprises an inductor, a group of LEDs and a power MOS connected to the inductor, an error amplifier and a pulse width modulator controlling the gate of the power MOS according to an error amplifier output. The error amplifier comprises a differential input stage, an output stage having a NMOS, a PMOS and an adjusting current source connected to the gate of the PMOS. During a first operation mode, a control voltage makes the adjusting current source turn on, and during a second operation mode, the control voltage makes the adjusting current source turn off.