Abstract: Digital video tape recorder ("VTR") and servo circuit for supporting the display of images during trick play VTR operation. The digital VTR, in one embodiment, having a single pair of heads of alternating azimuths located on a head cylinder one track width apart. The digital VTR records data that can be used to generate images during trick play tape speeds and directions of operation in fast scan tracks defined by the paths the single pair of heads trace over the tape during trick play operation. Each fast scan track crosses multiple normal play tracks. Sync blocks and track identification information are recorded on the tape along with video data. To align the heads with the appropriate fast scan track during trick play operation, a lookup table containing information on the pattern of fast scan tracks recorded on the tape is used.

Abstract: Methods and apparatus for implementing video decoders at a lower cost than known video decoders are described. The methods include data reduction techniques, simplified inverse quantization techniques, and dynamically varying prediction filter complexity as a function of whether luminance or chrominance data is being processed. In various embodiments, data representing portions of B frames which will not be displayed is identified and discarded, e.g., without performing a decoding operation thereon. Portions of I and P frames which will not be displayed are identified and decoded at a reduced resolution and/or using simplified inverse quantization techniques. The decoded I and P frame data is stored for use when making subsequent predictions if required.

Abstract: A heater is provided for use in conjunction with a cold start fuel injector for an internal combustion engine in which the injector, upon activation, injects fuel into a cold start passageway. The heater includes a metal tube having an interior and an exterior surface. The tube is positioned coaxially in the cold start passageway so that fuel flow from the cold start injector passes through the interior of the metal tube. A plurality of circumferentially spaced electrical heating elements are disposed around the outer periphery of the metal tube which, upon activation, heat the metal tube thereby increasing atomization of the fuel as it flows through the interior of the tube. Preferably, the heating elements are constructed of PTC. Alternative designs are also disclosed.

Abstract: Methods and apparatus for implementing a reduced cost HDTV/SDTV video decoder are disclosed. The described joint video decoder is capable of decoding HDTV pictures at approximately the resolution of standard definition television pictures and can be used to decode HDTV and/or SDTV pictures. The described video decoder may be used as part of a picture-in-picture decoder circuit for providing picture-in-picture capability without providing multiple full resolution video decoders. The reduction in decoder circuit complexity is achieved through the use of a plurality of data reduction techniques including the use of a preparser, downsampling, and truncating pixel values.

Abstract: Methods and apparatus for implementing a reduced cost HDTV/SDTV video decoder are disclosed. The described joint video decoder is capable of decoding HDTV pictures at approximately the resolution of standard definition television pictures and can be used to decode HDTV and/or SDTV pictures. The described video decoder may be used as part of a picture-in-picture decoder circuit for providing picture-in-picture capability without providing multiple full resolution video decoders. The reduction in decoder circuit complexity is achieved through the use of a plurality of data reduction techniques including the use of a preparser, downsampling, and truncating pixel values.

Abstract: Techniques for identifying blocks of pixels, referred to as constant block regions, having approximately the same intensity in terms of luminance values, are discussed. High contrast vertical and/or horizontal edges will cause significant prediction errors in images generated by reduced resolution decoders under certain conditions. Methods for assessing when such conditions exist and a significant prediction error is likely to occur are described. In addition methods and apparatus for minimizing the effect of such prediction errors in downsampling decoders are also described. One specific embodiment is directed to a new video decoder which decodes portions of a single image, e.g., frame, at different resolutions. Areas of the image along high contrast vertical or horizontal edges are decoded at full resolution while other portions of the same image are decoded at reduced resolution.

Abstract: Methods and apparatus for converting a relatively low frequency signal, e.g., a 1.5 MHz signal, to a high frequency signal, e.g., a 30-100 MHz signal, in the digital domain without the need for a digital mixer operating at the high frequency are described. The high frequency represents, e.g., the ultimate digital to analog conversion frequency. In accordance with the present invention an interpolation technique is used to convert the low rate digital signal to a high rate signal and to shift the carrier to a desired frequency. This is accomplished, by first positioning the information signal, e.g., the digital waveform to be modulated on a carrier at a relatively low rate using a digital mixer operating at a fraction of the ultimate digital to analog conversion frequency. The relatively low rate signal generated by the mixing operation is then converted to a high rate signal by one or more interpolator stages. An adjustable passband filter circuit is included in each interpolation stage.

Abstract: Methods and apparatus for detecting and correcting phase and amplitude imbalances existing between I (in-phase) and Q (quadrature phase) signal components of a complex signal, e.g., QAM or OPSK signal, that is being demodulated are described. The phase and amplitude imbalance and correction circuitry of the present invention are implemented as decision directed control loops which can be used in conjunction with an overall decision directed gain control loop. Amplitude imbalance is corrected by adjusting the gain of one of the I and Q signal components. Phase imbalance is corrected by adding a portion of one of the I and Q signal components to the other one of the I and Q signal components. Overall amplitude control is achieved by adjusting the gain of both the I and Q signal components by the same amount.

Abstract: Methods and apparatus for insuring that a trick play data stream, e.g., a stream of data used for fast forward or reverse playback operation, complies with preselected data standards and in particular the MPEG-2 standard are disclosed. Various methods are described for generating PCR, PTS and DTS values for a trick play data stream, which is generated from a normal play data steam, and is intended for recording in trick play segments of a tape. The described methods include generating new PCR, PTS and DTS values as a function of the trick play speed at which the data is intended to be read back. Methods and apparatus for correcting PCR, PTS and DTS values read from a tape during trick playback operation are also disclosed. The disclosed methods are directed to generating new PCRs, PTSs and DTSs to provide am MPEG-2 compliant bitstream. The described methods and apparatus are applicable to a plurality of storage and playback devices capable of implementing trick play including compact disks.

Abstract: Methods and apparatus for implementing digital modulators and programmable interpolation circuits used in such modulators are described. In one embodiment a modulator is implemented using an programmable interpolator which performs both pulse shaping and interpolation functions followed by a mixer which, in turn, is followed by a band shifting interpolator which operates at a fixed interpolation rate. By using the programmable interpolator/Nyquist filter of the present invention, multiple input sampling frequencies can be supported with the need to make the band shifting interpolator programmable. In addition, pulse shaping and interpolation operations are combined leading to a more efficient overall modulator design.

Abstract: Methods and apparatus for implementing a reduced cost HDTV/SDTV video decoder are disclosed. The described joint video decoder is capable of decoding HDTV pictures at approximately the resolution of standard definition television pictures and can be used to decode HDTV and/or SDTV pictures. The described video decoder may be used as part of a picture-in-picture decoder circuit for providing picture-in-picture capability without providing multiple full resolution video decoders. The reduction in decoder circuit complexity is achieved through the use of a plurality of data reduction techniques including the use of a preparser, downsampling, and truncating pixel values.

Abstract: Method and apparatus for extracting intra-coded video frames from a video data stream including inter-coded video frames and intra-coded video frames to produce reduced resolution intra-coded video frames suitable for recording in trick play tape segments of a tape for later play back and display during video tape recorder trick play operation. A plurality of methods and apparatus for buffering and selecting received intra-coded video frames for recording in trick play tape segments to support a plurality of trick play modes of operation are disclosed. In addition, a plurality of different data reduction methods and apparatus are disclosed for generating reduced resolution intra-coded frames from the received full resolution intra-coded video frames.

Abstract: Multidimensional similarity join finds pairs of multi-dimensional points that are within some small distance of each other. Databases in domains such as multimedia and time-series can require a high number of dimensions. The .epsilon.-k-d-B tree has been proposed as a data structure that scales better as number of dimensions increases compared to previous data structures such as the R-tree (and variations), grid-file, and k-d-B tree. We present a cost model of the .epsilon.-k-d-B tree and use it to optimize the leaf size. This new leaf size is shown to be better in most situations compared to previous work that used a constant leaf size. We present novel parallel procedures for the .epsilon.-k-d-B tree. A load-balancing strategy based on equi-depth histograms is shown to work well for uniform or low-skew situations, whereas another based on weighted, equi-depth histograms works far better for high-skew datasets. The latter strategy is only slightly slower than the former strategy for low skew datasets.

Abstract: The present invention is directed to an improved data clustering method and apparatus for use in data mining operations. The present invention determines the pattern vectors of a k-d tree structure which are closest to a given prototype cluster by pruning prototypes through geometrical constraints, before a k-means process is applied to the prototypes. For each sub-branch in the k-d tree, a candidate set of prototypes is formed from the parent of a child node. The minimum and maximum distances from any point in the child node to any prototype in the candidate set is determined. The smallest of the maximum distances found is compared to the minimum distances of each prototype in the candidate set. Those prototypes with a minimum distance greater than the smallest of the maximum distances are pruned or eliminated. Pruning the number of remote prototypes reduces the number of distance calculations for the k-means process, significantly reducing the overall computation time.

Abstract: Methods and apparatus for converting a relatively low frequency signal, e.g., a 1.5 MHz signal, to a high frequency signal, e.g., a 30-100 MHz signal, in the digital domain without the need for a digital mixer operating at the high frequency are described. The high frequency represents, e.g., the ultimate digital to analog conversion frequency. In accordance with the present invention an interpolation technique is used to convert the low rate digital signal to a high rate signal and to shift the carrier to a desired frequency. This is accomplished, by first positioning the information signal, e.g., the digital waveform to be modulated on a carrier at a relatively low rate using a digital mixer operating at a fraction of the ultimate digital to analog conversion frequency. The relatively low rate signal generated by the mixing operation is then converted to a high rate signal by one or more interpolator stages. An adjustable passband filter circuit is included in each interpolation stage.

Abstract: In accordance with the present invention an interpolation technique is used to convert a low rate digital signal to a high rate signal and to shift the carrier to a desired frequency. This is accomplished, by first positioning the information signal, e.g., the digital waveform to be modulated on a carrier at a relatively low rate using a digital mixer operating at a fraction of the ultimate digital to analog conversion frequency. The relatively low rate signal generated by the mixing operation is then converted to a high rate signal by one or more interpolator stages. An adjustable passband filter circuit is included in each interpolation stage. One feature of the present invention is directed to a control circuit which is response to an H bit frequency control word representing a desired output carrier frequency. The control circuit generates individual filter control signals for each adjustable filter circuit from the single H bit frequency control word.

Abstract: Plurality of encoding methods and apparatus for encoding video data in a manner that makes it well suited for decoding by either regular or downconverting decoders are described. In one embodiment, the selection and/or generation of motion vectors by an encoder is controlled so that only motion vectors having a size that corresponds to an integer multiple of a downsampling rate expected to be used by a downconverting decoder are generated and/or selected. In another embodiment, motion vectors having a size which corresponds to an integer multiple of an expected downsampling rate are preferred over other motion vectors. In various additional encoder embodiments feedback circuitry which models a downconverting decoder, and/or which provides feedback information on downconverted images generated by decoding the compressed video data generated by the encoder using a downconverting decoder, are incorporated into the encoder of the present invention.

Abstract: An implementation efficient video decoder suitable for use as a picture in picture decoder is described. In one embodiment, the video decoder receives primary and secondary bitstreams with the secondary bitstream including the video data intended to be displayed as inset pictures. The decoder uses many of the same circuit components on a time shared basis to decode both the main and inset pictures reducing the amount of circuitry required to implement the decoder. In one embodiment a preparser discards the majority of DCT coefficients in the secondary bitstream and the remaining data is variable length decoded and then variable length encoded using a non-MPEG compliant coding scheme prior to storing the inset picture data in a coded data buffer. Re-encoding of the selected inset picture data in this manner greatly reduces data storage requirements and simplifies the circuitry required to subsequently decode the inset picture data.

Abstract: Methods and apparatus for performing packet synchronization recovery and error detection operation on packets including a CRC check byte, e.g., MCNS packets, are described. The present invention uses a memory during a sync acquisition mode of operation to serve as a storage device for the output of a first function circuit. The delayed bits are used as the input along with current bits from the packet stream to a second function circuit. The second function circuit generates a syndrome byte of interest. When the received packets are error free and the decoder is properly aligned with the packet structure of the bitstream, the syndrome byte of interest will assume a preselected value, e.g., 47 Hex. Once packet synchronization has been achieved, the relatively few bits output by the first function circuit which are required as delayed inputs to the second function circuit are identified and stored using a delay register which is much smaller than the memory.

Abstract: Improved carrier recovery methods and apparatus suitable for use with QAM, QPSK and a wide variety of other modulation formats is described. In accordance with the invention, the phase error between received symbols, representing a frequency error, is determined using one of a plurality of techniques. The estimated frequency error is used to adjust the phase and/or frequency of a received carrier signal to achieve a frequency lock. The methods and apparatus of the present invention can be easily integrated into existing carrier recovery designs to supplement known frequency In accordance with a first embodiment of the present invention, the receipt of pairs of consecutive outer symbols is detected, a frequency error associated with each pair of consecutive symbols is generated, and the frequency error is compared to a selected threshold value to determine if it is a non-ambiguous estimate of the frequency error.