Abstract: A method and structure for probabilistic shaping and compensation techniques in coherent optical receivers. According to an example, the present invention provides a method and structure for an implementation of distribution matcher encoders and decoders for probabilistic shaping applications. The techniques involved avoid the traditional implementations based on arithmetic coding, which requires intensive multiplication functions. Furthermore, these probabilistic shaping techniques can be used in combination with LDPC codes through reverse concatenation techniques.

Abstract: A receiver (e.g., for a 10G fiber communications link) includes an interleaved ADC coupled to a multi-channel equalizer that can provide different equalization for different ADC channels within the interleaved ADC. That is, the multi-channel equalizer can compensate for channel-dependent impairments. In one approach, the multi-channel equalizer is a feedforward equalizer (FFE) coupled to a Viterbi decorder, for example, a sliding block Viterbi decoder (SBVD); and the FFE and/or the channel estimator for the Viterbi decoder are adapted using the LMS algorithm.

Abstract: The present invention is directed to communication systems and methods. According to an embodiment, a receiving optical transceiver determines signal quality for signals received from a transmitting optical transceiver. Information related to the signal quality is embedded into back-channel data and sent to the transmitting optical transceiver. The transmitting optical transceiver detects the presence of the back-channel data and adjusts one or more of its operating parameters based on the back-channel data. There are other embodiments as well.

Abstract: An coherent transceiver includes a single silicon photonics substrate configured to integrate a laser diode chip flip-mounted and coupled with a wavelength tuning section to provide a laser output with tuned wavelengths which is split in X:Y ratio partly into a coherent receiver block as local-oscillator signals and partly into a coherent transmitter block as a light source. The coherent receiver includes a polarization-beam-splitter-rotator to split a coherent input signal to a TE-mode signal and a TM*-mode signal respectively detected by two 90-deg hybrid receivers and a flip-mounted TIA chip assisted by two local-oscillator signals from the tunable laser device.

Abstract: A transimpedance amplifier (TIA) device. The device includes a photodiode coupled to a differential TIA with a first and second TIA, which is followed by a Level Shifting/Differential Amplifier (LS/DA). The photodiode is coupled between a first and a second input terminal of the first and second TIAs, respectively. The LS/DA can be coupled to a first and second output terminal of the first and second TIAs, respectively. The TIA device includes a semiconductor substrate comprising a plurality of CMOS cells, which can be configured using 28 nm process technology to the first and second TIAs. Each of the CMOS cells can include a deep n-type well region. The second TIA can be configured using a plurality CMOS cells such that the second input terminal is operable at any positive voltage level with respect to an applied voltage to a deep n-well for each of the plurality of second CMOS cells.

Abstract: A method of controlling bandwidth and peaking over gain in a variable gain amplifier (VGA) device and structure therefor. The device includes at least three differential transistor pairs configured as a cross-coupled differential amplifier with differential input nodes, differential bias nodes, differential output nodes, a current source node, and two cross-coupling nodes. The cross-coupled differential amplifier includes a load resistor coupled to each of the differential output nodes and one of the cross-coupling nodes, and a load inductor coupled to the each of the cross-coupling nodes and a power supply rail. A current source is electrically coupled to the current source node. The cross-coupling configuration with the load resistance and inductance results in a lower bandwidth and lowered peaking at low gain compared to high gain. Further, the tap point into the inductor can be chosen as another variable to “tune” the bandwidth and peaking in a communication system.

Abstract: Embodiments of the present invention include an apparatus that receives date from multiple lanes, which are then aligned and synchronized for transcoding and encoding.

Abstract: A transimpedance amplifier includes a T-coil in its feedback loop to expand its bandwidth. The transimpedance amplifier includes an amplifier that converts and amplifies an input current signal to an intermediary voltage signal. One terminal of the T-coil is coupled to a resistor in the feedback loop which is coupled to the input of the amplifier. Another terminal of the T-coil is coupled to the output of an amplifier. The bridge point of the T-coil is coupled to the output terminal of the transimpedance amplifier which outputs an output voltage. The T-coil includes two inductors that are mutually coupled such that a current is induced to compensate for the leakage current caused by the parasitic capacitance of the transimpedance amplifier.

Abstract: The present invention is directed to a communication signal tracking system comprising an optical receiver including one or more delay line interferometers (DLIs) configured to demultiplex incoming optical signals and a transimpedance amplifier configured to convert the incoming optical signals to incoming electrical signals. The communication signal tracking system further includes a control module configured to calculate a bit-error-rate (BER) of the incoming electrical signals before forward-error correction decoding, and use the BER as a parameter for optimizing settings of the one or more DLIs in one or more iterations in a control loop and generating a back-channel data.

Abstract: An integrated compact light engine configured in a on-board in-package optics assembly. The compact light engine includes a single substrate to integrate multiple optical-electrical modules. Each optical-electrical module includes an integrated optical transceiver based on silicon-photonics platform, in which a transmit path configured to output four light signals centered at four CWDM wavelengths and from four laser devices and to modulate the four light signals respectively by four modulators driven by a driver chipand to deliver a multiplexed transmission light. A receive path includes a photodetector to detect four input signals demultiplexed from an incoming light and a trans-impedance amplifier chip to process electrical signals converted from the four input signals detected. A multi-channel light engine is formed by co-integrating or co-mounting a switch device with multiple compact light engines on a common substrate member to provide up to 51.

Abstract: The present invention relates to data communication and electrical circuits. More specifically, embodiments of the present invention provide a clock and data recovery (CDR) architecture implementation for high data rate wireline communication links. In an embodiment, a CDR device includes a phase detector, a loop filter, and a fractional-N PLL. The fractional-N PLL generates output clock signal based on output of the loop filter. There are other embodiments as well.

Abstract: The present invention is directed to electrical circuits. According to an embodiment, the present invention provides a charge pump circuit with a bias section and a switch section. The switch section includes a first switch coupled to an early signal and a second switch coupled to a late signal. The charge pump additionally includes a low-pass filter. The switch section includes a first resistor and a second resistor. The first resistor is directly coupled to the first switch and the low-pass filter. The second resistor is directly coupled to the second switch and the first resistor. There are other embodiments as well.

Abstract: A silicon-based edge coupler for coupling a fiber with a waveguide includes a cantilever member being partially suspended with its anchored end coupled to a silicon photonics die in a first part of a silicon substrate and a free end terminated near an edge region separating a second part of the silicon substrate from the first part. The edge coupler further includes a mechanical stopper formed at the edge region with a gap distance ahead of the free end of the cantilever member. Additionally, a V-groove is formed in the second part of the silicon substrate characterized by a top opening and a bottom plane symmetrically connected by two sloped side walls along a fixed Si-crystallography angle. The V-groove is configured to support a fiber with an end facet being pushed against the mechanical stopper and a core center being aligned with the free end of the cantilever member.

Abstract: The present invention is directed to communication methods and systems thereof. In a specific embodiment, a noise cancelation system includes a slicer that processes a data stream generates both PAM symbols and error data. An RIN estimator generates RIN data based on the PAM symbols and the error data. A filter removes non-RIN information from the RIN data. The filtered RIN data includes an offset term and a gain term, which are used to remove RIN noise from the data stream. There are other embodiments as well.

Abstract: In an example, the present invention includes an integrated system on chip device. The device has a variable bias block configured with the control block, the variable bias block being configured to selectively tune each of a plurality of laser devices provided on the silicon photonics device to adjust for at least a wavelength of operation, a fabrication tolerance, and an extinction ratio.

Abstract: The present invention is directed to electrical circuits. More specifically, embodiments of the present invention provide a charge pump, which can be utilized as a part of a clock data recovery device. Early and late signals are used as differential switching voltage signals in the charge pump. The first switch and a second switch are used for controlling the direction of the current flowing into the loop filter. Input differential voltages to the switches are being generated with an opamp negative feedback loop. The output voltage of the first switch and the second switch is used in conjunction with a resistor to generate a charge pump current. There are other embodiments as well.

Abstract: The present invention is directed to electrical circuits and techniques thereof. In various embodiments, the present invention provides a variable gain amplifier architecture that includes a continuous-time linear equalizer (CTLE) section and a variable gain amplifier (VGA) section. The CTLE section provides both a pair of equalized data signals and a common mode voltage. A DAC generates a control signal based on a control code. The VGA section amplifies the pair of equalized data signals by an amplification factor using a transistor whose resistance value is based on both the common mode voltage and the control signal. There are other embodiments as well.

Abstract: The present invention is directed to communication systems and electrical circuits. According to an embodiment, an input termination circuit includes a first attenuation resistor and a second attenuation resistor. The resistance values of these two resistors are adjusted in opposite directions to maintain a stable output impedance. There are other embodiments as well.

Abstract: A timing recovery system generates a sampling clock to synchronize sampling of a receiver to a symbol rate of an incoming signal. The input signal is received over an optical communication channel. The receiver generates a timing matrix representing coefficients of a timing tone detected in the input signal. The timing tone representing frequency and phase of a symbol clock of the input signal and has a non-zero timing tone energy. The receiver computes a rotation control signal based on the timing matrix that represents an amount of accumulated phase shift in the input signal relative to the sampling clock. A numerically controlled oscillator is controlled to adjust at least one of the phase and frequency of the sampling clock based on the rotation control signal.

Abstract: An coherent transceiver includes a single silicon photonics substrate configured to integrate a laser diode chip flip-mounted and coupled with a wavelength tuning section to provide a laser output with tuned wavelengths which is split in X:Y ratio partly into a coherent receiver block as local-oscillator signals and partly into a coherent transmitter block as a light source. The coherent receiver includes a polarization-beam-splitter-rotator to split a coherent input signal to a TE-mode signal and a TM*-mode signal respectively detected by two 90-deg hybrid receivers and a flip-mounted TIA chip assisted by two local-oscillator signals from the tunable laser device.